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    M48Z35-70PC1

    256 Kbit (32 Kbit x 8) ZEROPOWER® SRAM

    Parameters
    Operating RangeCommercial
    Supply Voltage Min Volt4.75
    Supply Voltage Max Volt5.5
    ECCN USEAR99
    ECCN EUNEC
    Packing TypeTube
    RoHs compliantEcopack3
    GradeIndustrial
    Package NamePDIP 28 .7
    Description

    The M48Z35/Y ZEROPOWER®RAM is a 32 K x 8, non-volatile static RAM that integrates power-fail deselect circuitry and battery control logic on a single die. The monolithic chip is available in two special packages to provide a highly integrated battery-backed memory solution.The M48Z35/Y is a...
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    Key features
    Key features
    • Integrated, ultra low power SRAM, power-fail control circuit, and battery
    • READ cycle time equals WRITE cycle time
    • Automatic power-fail chip deselect and WRITE protection
    • WRITE protect voltages: (VPFD= power-fail deselect voltage)
      • M48Z35: VCC= 4.75 to 5.5 V; 4.5 V ≤ VPFD≤ 4.75 V
      • M48Z35Y: 4.5 to 5.5 V; 4.2 V ≤ VPFD≤ 4.5 V
    • Self-contained battery in the CAPHAT™DIP package
    • Packaging includes a 28-lead SOIC and SNAPHAT®top (to be ordered separately)
    • Pin and function compatible with JEDEC standard 32 K x 8 SRAMs
    • SOIC package provides direct connection for a SNAPHAT®top which contains the battery
    • RoHS compliant
      • Lead-free second level interconnect
    Out of Stock
    Quantity $ per unit Savings
    1-2$20.520%
    2 + Contact sales
    $20.52
    Parameters
    Operating RangeCommercial
    Supply Voltage Min Volt4.75
    Supply Voltage Max Volt5.5
    ECCN USEAR99
    ECCN EUNEC
    Packing TypeTube
    RoHs compliantEcopack3
    GradeIndustrial
    Package NamePDIP 28 .7
    Description

    The M48Z35/Y ZEROPOWER®RAM is a 32 K x 8, non-volatile static RAM that integrates power-fail deselect circuitry and battery control logic on a single die. The monolithic chip is available in two special packages to provide a highly integrated battery-backed memory solution.The M48Z35/Y is a...
    Read More

    Key features
    Key features
    • Integrated, ultra low power SRAM, power-fail control circuit, and battery
    • READ cycle time equals WRITE cycle time
    • Automatic power-fail chip deselect and WRITE protection
    • WRITE protect voltages: (VPFD= power-fail deselect voltage)
      • M48Z35: VCC= 4.75 to 5.5 V; 4.5 V ≤ VPFD≤ 4.75 V
      • M48Z35Y: 4.5 to 5.5 V; 4.2 V ≤ VPFD≤ 4.5 V
    • Self-contained battery in the CAPHAT™DIP package
    • Packaging includes a 28-lead SOIC and SNAPHAT®top (to be ordered separately)
    • Pin and function compatible with JEDEC standard 32 K x 8 SRAMs
    • SOIC package provides direct connection for a SNAPHAT®top which contains the battery
    • RoHS compliant
      • Lead-free second level interconnect