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SPC560P40L3CEFAR

SPC560P40L3CEFAR

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SPC560P40L3CEAAR

32-bit Power Architecture MCU for Automotive Chassis and Safety Applications

Supply Voltage Min Volt3.0
Supply Voltage Max Volt5.5
Coree200z0
ECCN US5A991.b.4.a
ECCN EUNEC
Packing TypeTape And Reel
RoHs compliantEcopack2
GradeAutomotive
Package NameLQFP 100 14x14x1.4 mm

This 32-bit system-on-chip (SoC) automotive microcontroller family is the latest achievement in integrated automotive application controllers. It belongs to an expanding range of automotive-focused products designed to address chassis applications—specifically, electrical hydraulic power steering...
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Key features
  • Up to 64 MHz, single issue, 32-bit CPU core complex (e200z0h)
    • Compliant with Power Architecture®embedded category
    • Variable Length Encoding (VLE)
  • Memory organization
    • Up to 256 KB on-chip code flash memory with ECC and erase/program controller
    • Additional 64 (4 × 16) KB on-chip data flash memory with ECC for EEPROM emulation
    • Up to 20 KB on-chip SRAM with ECC
  • Fail-safe protection
    • Programmable watchdog timer
    • Non-maskable interrupt
    • Fault collection unit
  • Nexus Class 1 interface
  • Interrupts and events
    • 16-channel eDMA controller
    • 16 priority level controller
    • Up to 25 external interrupts
    • PIT implements four 32-bit timers
    • 120 interrupts are routed via INTC
  • 1 general purpose eTimer unit
    • 6 timers each with up/down capabilities
    • 16-bit resolution, cascadable counters
    • Quadrature decode with rotation direction flag
    • Double buffer input capture and output compare
  • GPIO (37 on LQFP64; 64 on LQFP100) individually programmable as I/O or special function
  • Communications interfaces
    • 2 LINFlex channels (1× Master/Slave, 1× Master only)
    • Up to 3 DSPI channels with automatic chip select generation (up to 8/4/4 chip selects)
    • Up to 2 FlexCAN interface (2.0B Active) with 32 message buffers
    • 1 safety port based on FlexCAN with 32 message buffers and up to 8 Mbit/s at 64 MHz capability usable as second CAN when not used as safety port
  • One 10-bit analog-to-digital converter (ADC)
    • Up to 16 input channels (16 on LQFP100 / 12 on LQFP64)
    • Conversion time < 1 μs including sampling time at full precision
    • Programmable Cross Triggering Unit (CTU)
    • 4 analog watchdogs with interrupt capability
  • On-chip CAN/UART bootstrap loader with Boot Assist Module (BAM)
  • 1 FlexPWM unit: 8 complementary or independent outputs with ADC synchronization signals
Out of Stock
Quantity $ per unit Savings
1-9$7.900%
10-24$7.1310%
25-99$6.8014%
100-249$5.9125%
250-499$5.6529%
500$5.1535%
Contact sales
$7.90
Supply Voltage Min Volt3.0
Supply Voltage Max Volt5.5
Coree200z0
ECCN US5A991.b.4.a
ECCN EUNEC
Packing TypeTape And Reel
RoHs compliantEcopack2
GradeAutomotive
Package NameLQFP 100 14x14x1.4 mm

This 32-bit system-on-chip (SoC) automotive microcontroller family is the latest achievement in integrated automotive application controllers. It belongs to an expanding range of automotive-focused products designed to address chassis applications—specifically, electrical hydraulic power steering...
Read More

Key features
  • Up to 64 MHz, single issue, 32-bit CPU core complex (e200z0h)
    • Compliant with Power Architecture®embedded category
    • Variable Length Encoding (VLE)
  • Memory organization
    • Up to 256 KB on-chip code flash memory with ECC and erase/program controller
    • Additional 64 (4 × 16) KB on-chip data flash memory with ECC for EEPROM emulation
    • Up to 20 KB on-chip SRAM with ECC
  • Fail-safe protection
    • Programmable watchdog timer
    • Non-maskable interrupt
    • Fault collection unit
  • Nexus Class 1 interface
  • Interrupts and events
    • 16-channel eDMA controller
    • 16 priority level controller
    • Up to 25 external interrupts
    • PIT implements four 32-bit timers
    • 120 interrupts are routed via INTC
  • 1 general purpose eTimer unit
    • 6 timers each with up/down capabilities
    • 16-bit resolution, cascadable counters
    • Quadrature decode with rotation direction flag
    • Double buffer input capture and output compare
  • GPIO (37 on LQFP64; 64 on LQFP100) individually programmable as I/O or special function
  • Communications interfaces
    • 2 LINFlex channels (1× Master/Slave, 1× Master only)
    • Up to 3 DSPI channels with automatic chip select generation (up to 8/4/4 chip selects)
    • Up to 2 FlexCAN interface (2.0B Active) with 32 message buffers
    • 1 safety port based on FlexCAN with 32 message buffers and up to 8 Mbit/s at 64 MHz capability usable as second CAN when not used as safety port
  • One 10-bit analog-to-digital converter (ADC)
    • Up to 16 input channels (16 on LQFP100 / 12 on LQFP64)
    • Conversion time < 1 μs including sampling time at full precision
    • Programmable Cross Triggering Unit (CTU)
    • 4 analog watchdogs with interrupt capability
  • On-chip CAN/UART bootstrap loader with Boot Assist Module (BAM)
  • 1 FlexPWM unit: 8 complementary or independent outputs with ADC synchronization signals