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SPC56AP60L5CEFAR

SPC56AP60L5CEFAR

Active

SPC56AP60L5CEFAY

32-bit Power Architecture MCU for Automotive Chassis and Safety Applications

Supply Voltage Min Volt3.0
Supply Voltage Max Volt5.5
Operating Temp Min Celsius-40.0
Operating Temp Max Celsius125.0
CoreDual e200z0
ECCN US5A991.b.4.a
ECCN EUNEC
Packing TypeTray
RoHs compliantEcopack2
GradeAutomotive
Package NameLQFP 144 20x20x1.4 mm

This 32-bit system-on-chip (SoC) automotive microcontroller family is the latest achievement in integrated automotive application controllers. It belongs to an expanding range of automotive-focused products designed to address chassis applications specifically the airbag application.

Key features
  • 64 MHz, single issue, 32-bit CPU core complex (e200z0h)
    • Compliant with Power Architecture®embedded category
    • Variable Length Encoding (VLE)
  • Memory organizazion
    • Up to 1024 KB on-chip code Flash memory with additional 64 KB for EEPROM emulation (data flash), with ECC, with erase/program controller
    • Up to 80 KB on-chip SRAM with ECC
  • Fail safe protection
    • ECC protection on system SRAM and Flash
    • Safety port
    • SWT with servicing sequence pseudo-random generator
    • Power management
    • Non-maskable interrupt for both cores
    • Fault collection and control unit (FCCU)
    • Safe mode of system-on-chip (SoC)
    • Register protection scheme
  • Nexus®L2+ interface
  • Single 3.3 V or 5 V supply for I/Os and ADC
  • 2 on-platform peripherals set with 2 INTC
  • 16-channel eDMA controller with multiple transfer request sources
  • General purpose I/Os (80 GPIO + 26 GPI on LQFP144; 49 GPIO + 16 GPI on LQFP100)
  • 2 general purpose eTimer units
    • 6 timers, each with up/down count capabilities
    • 16-bit resolution, cascadable counters
    • Quadrature decode with rotation direction flag
    • Double buffer input capture and output compare
  • Communications interfaces
    • 2 LINFlex modules (LIN 2.1, 1 × Master/Slave, 1 × Master Only)
    • 5 DSPI modules with automatic chip select generation
    • 2 FlexCAN interfaces (2.0B Active) with 32 message buffers
    • 1 Safety port based on FlexCAN; usable as third CAN when not used as safety port
    • 1 FlexRay™ module (V2.1) with dual or single channel, 64 message buffers and up to 10 Mbit/s
  • 2 CRC units with three contexts and 3 hardwired polynomials(CRC8,CRC32 and CRC-16-CCITT)
  • 10-bit A/D converter
    • 27 input channels and pre-sampling feature
    • Conversion time < 1 μs including sampling time at full precision
    • Programmable cross triggering unit (CTU)
    • 4 analog watchdog with interrupt capability
  • On-chip CAN/UART Bootstrap loader with boot assist module (BAM)
  • Ambient temperature ranges: –40 to 125 °C or –40 to 105 °C
Out of Stock
Quantity $ per unit Savings
1-359$10.510%
360-500$7.7526%
Contact sales
$10.51
Supply Voltage Min Volt3.0
Supply Voltage Max Volt5.5
Operating Temp Min Celsius-40.0
Operating Temp Max Celsius125.0
CoreDual e200z0
ECCN US5A991.b.4.a
ECCN EUNEC
Packing TypeTray
RoHs compliantEcopack2
GradeAutomotive
Package NameLQFP 144 20x20x1.4 mm

This 32-bit system-on-chip (SoC) automotive microcontroller family is the latest achievement in integrated automotive application controllers. It belongs to an expanding range of automotive-focused products designed to address chassis applications specifically the airbag application.

Key features
  • 64 MHz, single issue, 32-bit CPU core complex (e200z0h)
    • Compliant with Power Architecture®embedded category
    • Variable Length Encoding (VLE)
  • Memory organizazion
    • Up to 1024 KB on-chip code Flash memory with additional 64 KB for EEPROM emulation (data flash), with ECC, with erase/program controller
    • Up to 80 KB on-chip SRAM with ECC
  • Fail safe protection
    • ECC protection on system SRAM and Flash
    • Safety port
    • SWT with servicing sequence pseudo-random generator
    • Power management
    • Non-maskable interrupt for both cores
    • Fault collection and control unit (FCCU)
    • Safe mode of system-on-chip (SoC)
    • Register protection scheme
  • Nexus®L2+ interface
  • Single 3.3 V or 5 V supply for I/Os and ADC
  • 2 on-platform peripherals set with 2 INTC
  • 16-channel eDMA controller with multiple transfer request sources
  • General purpose I/Os (80 GPIO + 26 GPI on LQFP144; 49 GPIO + 16 GPI on LQFP100)
  • 2 general purpose eTimer units
    • 6 timers, each with up/down count capabilities
    • 16-bit resolution, cascadable counters
    • Quadrature decode with rotation direction flag
    • Double buffer input capture and output compare
  • Communications interfaces
    • 2 LINFlex modules (LIN 2.1, 1 × Master/Slave, 1 × Master Only)
    • 5 DSPI modules with automatic chip select generation
    • 2 FlexCAN interfaces (2.0B Active) with 32 message buffers
    • 1 Safety port based on FlexCAN; usable as third CAN when not used as safety port
    • 1 FlexRay™ module (V2.1) with dual or single channel, 64 message buffers and up to 10 Mbit/s
  • 2 CRC units with three contexts and 3 hardwired polynomials(CRC8,CRC32 and CRC-16-CCITT)
  • 10-bit A/D converter
    • 27 input channels and pre-sampling feature
    • Conversion time < 1 μs including sampling time at full precision
    • Programmable cross triggering unit (CTU)
    • 4 analog watchdog with interrupt capability
  • On-chip CAN/UART Bootstrap loader with boot assist module (BAM)
  • Ambient temperature ranges: –40 to 125 °C or –40 to 105 °C