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    ST8024LCTR

    ST8024LCTR

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    ST8024LTR

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    Smartcard interface
    Learn More about ST8024LTR

    Quantity $ per Unit Savings
    1 - 9$2.100%
    10 - 24$1.8910%
    25 - 99$1.7815%
    100 - 249$1.5228%
    250 - 499$1.4332%
    500$1.2540%
    500 + Contact Sales
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    Out of stock
    $2.10
    Parameter NameParameter Value
    Supply Voltage Min Volt2.7
    Supply Voltage Max Volt6.5
    Operating Temp Min Celsius-25.0
    Operating Temp Max Celsius85.0
    ECCN USEAR99
    ECCN EUNEC
    Packing TypeTape And Reel
    RoHs compliantEcopack1
    GradeIndustrial
    Package NameTSSOP-20

    The ST8024L is a complete low-cost analog interface for asynchronous Class A, B, and C smartcards. It can be placed between the card and the microcontroller with few external components to perform all supply protection and control functions. The ST8024LCDR and ST8024LCTR are compatible with the ST8024 (with the exception of Vth(ext)rise/fallvalue).

    Key features
    • Designed to be compatible with the NDS conditional access system (except ST8024LTR)
    • ISO 7816, GSM11.11 and EMV 4.2 (payment systems) compatible
    • IC card interface
    • 3 V or 5 V supply for the ST8024L device (VDD)
    • Three specifically protected half-duplex bi-directional buffered I/O lines to card contacts C4, C7 and C8
    • Step-up converter for VCCgeneration separately powered by a 5 V ± 20% supply (VDDPand PGND)
    • 1.8 V ± 6.5%, 3 V or 5 V ± 5% regulated card supply voltage (VCC) with appropriate decoupling has the following capabilities:
      • ICC< 80 mA at VDDP= 4.75 to 6.5 V
      • Handles current spikes of 40 nA up to 20 MHz
      • Controls rise and fall times
      • Filtered overload detection at ~120 mA
    • Thermal and short-circuit protection on all card contacts
    • Automatic activation and deactivation sequences; initiated by software or by hardware in the event of a short-circuit, card take-off, overheating, VDDor VDDPdropout
    • Enhanced ESD protection on card side (>6 kV)
    • 26 MHz integrated crystal oscillator
    • Built-in debounce on card presence contacts
    • One multiplexed status signalOFF
    • Non-inverted control of RST via pin RSTIN
    • Clock generation for cards up to 20 MHz (divided by 1, 2, 4 or 8 through CLKDIV1 and CLKDIV2 signals) with synchronous frequency changes
    • Supply supervisor for spike-killing during power-on and power-off and power-on reset (threshold fixed internally or externally by a resistor divider)