STA8100GA

Teseo V Multi frequency GNSS receiver

Parameters

Operating Range	Automotive
Supply Voltage Min Volt	1.71
Supply Voltage Max Volt	3.6
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	105.0
Core	Arm Cortex-M7
ECCN US	7A994
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Automotive
Package Name	LFBGA 8X8X1.7 81 PITCH 0.8 BALL

Description

STA8100GA is part of the Teseo V family.STA8100GA is a multi-band multi-constellation positioning receiver IC able to manage all the GNSS constellations such as GPS, Galileo, Glonass, BeiDou, NAVIC (former IRNSS) and QZSS, in L1, L2, L5 and E6 frequency bands. Security feature (enabled only for...
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Key features

Key features
AEC-Q100 qualified STMicroelectronics 5^th generation positioning receiver with 80 tracking channels and 4 fast acquisition channels compatible with 6 constellations: GPS, Galileo, GLONASS, BeiDou, QZSS, NAVIC (former IRNSS) Dual band L1 and L5 single chip solution Triple band capability with external RF STA5635A ST-DRAW (Dead Reckoning Automotive Way) is supported on STA8100GAD and STA8100GADS only SBAS systems: WAAS, EGNOS, MSAS, GAGAN, BeiDou Code phase, carrier phase, doppler frequency measurement Antenna sensing PPS output Notch filter for anti-jamming ARM^® Cortex^® M7 core: Maximum clock frequency 314 MHz 16 KB I-cache and 16 KB D-cache 64 KB I-TCM and 384 KB D-TCM, core clock speed Nested vector interrupt controller JTAG debugging capability 256 Kbyte system RAM Hardware Security Module (HSM) with HW cryptographic co-processor is enabled for STA8100GAS only 32 channels DMA Memory interfaces: SFC (Octal/Quad serial flash controller, SDR) SD multimedia card Serial interfaces: 3 x UART Synchronous serial port (SPI supported) I²C 2 x multi mode serial interfaces 2 x CAN controllers Core peripherals: 2 x multi timer units Watchdog timer 1 x extended function timers 32 kHz oscillator real time clock AES decipher hardware accelerator Power management unit, with separate power supply domain and on-chip LDO and high voltage/low voltage monitors: Backup voltage domain 1.7 to 3.6 V with LDO for always-on core supply and HV/LV detectors, and dedicated IO-ring0 Main voltage domain 1.7 to 3.6 V with LDO for switchable logic domain and HV/LV detectors for 85 °C maximum ambient temperature operations or 1.2 V +/ - 5 % external voltage supply for 105 °C maximum ambient temperature operations Separate RF domain with dedicated LDO IO-ring1 1.8 or 3.3 V capable, and dedicated 1.8 V LDO IO-ring2 3.3 V +/ -10 % capable Fail safe GPIOs available USB2.0 full speed (12 Mb/s) with integrated physical layer transceiver ESD: 2 kV (HBM) and 500 V (CDM) Automotive grade 105 °C option

In stock

Quantity	$ per unit	Savings
1-9	$10.43	0%
10-24	$9.58	8%
25-99	$9.19	12%
100-249	$8.10	22%
250-499	$7.70	26%
500	$7.20	31%
500 +	Contact sales

$10.43

Parameters

Operating Range	Automotive
Supply Voltage Min Volt	1.71
Supply Voltage Max Volt	3.6
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	105.0
Core	Arm Cortex-M7
ECCN US	7A994
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Automotive
Package Name	LFBGA 8X8X1.7 81 PITCH 0.8 BALL

Description

Key features

Key features
AEC-Q100 qualified STMicroelectronics 5^th generation positioning receiver with 80 tracking channels and 4 fast acquisition channels compatible with 6 constellations: GPS, Galileo, GLONASS, BeiDou, QZSS, NAVIC (former IRNSS) Dual band L1 and L5 single chip solution Triple band capability with external RF STA5635A ST-DRAW (Dead Reckoning Automotive Way) is supported on STA8100GAD and STA8100GADS only SBAS systems: WAAS, EGNOS, MSAS, GAGAN, BeiDou Code phase, carrier phase, doppler frequency measurement Antenna sensing PPS output Notch filter for anti-jamming ARM^® Cortex^® M7 core: Maximum clock frequency 314 MHz 16 KB I-cache and 16 KB D-cache 64 KB I-TCM and 384 KB D-TCM, core clock speed Nested vector interrupt controller JTAG debugging capability 256 Kbyte system RAM Hardware Security Module (HSM) with HW cryptographic co-processor is enabled for STA8100GAS only 32 channels DMA Memory interfaces: SFC (Octal/Quad serial flash controller, SDR) SD multimedia card Serial interfaces: 3 x UART Synchronous serial port (SPI supported) I²C 2 x multi mode serial interfaces 2 x CAN controllers Core peripherals: 2 x multi timer units Watchdog timer 1 x extended function timers 32 kHz oscillator real time clock AES decipher hardware accelerator Power management unit, with separate power supply domain and on-chip LDO and high voltage/low voltage monitors: Backup voltage domain 1.7 to 3.6 V with LDO for always-on core supply and HV/LV detectors, and dedicated IO-ring0 Main voltage domain 1.7 to 3.6 V with LDO for switchable logic domain and HV/LV detectors for 85 °C maximum ambient temperature operations or 1.2 V +/ - 5 % external voltage supply for 105 °C maximum ambient temperature operations Separate RF domain with dedicated LDO IO-ring1 1.8 or 3.3 V capable, and dedicated 1.8 V LDO IO-ring2 3.3 V +/ -10 % capable Fail safe GPIOs available USB2.0 full speed (12 Mb/s) with integrated physical layer transceiver ESD: 2 kV (HBM) and 500 V (CDM) Automotive grade 105 °C option