STM32F207VET6

High-performance Arm Cortex-M3 MCU with 512 Kbytes of Flash memory, 120 MHz CPU, ART Accelerator, Ethernet

Parameters

Supply Voltage Min Volt	1.8
Supply Voltage Max Volt	3.6
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	85.0
Core	Arm Cortex-M3
ECCN US	3A991.a.2
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Industrial
Package Name	LQFP 100 14x14x1.4 mm

Description

The STM32F20x family is based on the high-performance Arm® Cortex®-M3 32-bit RISC core operating at a frequency of up to 120 MHz. The family incorporates high-speed embedded memories (Flash memory up to 1 Mbyte, up to 128 Kbytes of system SRAM), up to 4 Kbytes of backup SRAM, and an extensive...
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Key features

Key features
Core: Arm^® 32-bit Cortex^®-M3 CPU (120 MHz max) with Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution performance from Flash memory, MPU, 150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1) Memories Up to 1 Mbyte of Flash memory 512 bytes of OTP memory Up to 128 + 4 Kbytes of SRAM Flexible static memory controller that supports Compact Flash, SRAM, PSRAM, NOR and NAND memories LCD parallel interface, 8080/6800 modes Clock, reset and supply management From 1.8 to 3.6 V application supply + I/Os POR, PDR, PVD and BOR 4 to 26 MHz crystal oscillator Internal 16 MHz factory-trimmed RC 32 kHz oscillator for RTC with calibration Internal 32 kHz RC with calibration Low-power modes Sleep, Stop and Standby modes V_BAT supply for RTC, 20 × 32 bit backup registers, and optional 4 Kbytes backup SRAM 3 × 12-bit, 0.5 µs ADCs with up to 24 channels and up to 6 MSPS in triple interleaved mode 2 × 12-bit D/A converters General-purpose DMA: 16-stream controller with centralized FIFOs and burst support Up to 17 timers Up to twelve 16-bit and two 32-bit timers, up to 120 MHz, each with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input Debug mode: Serial wire debug (SWD), JTAG, and Cortex^®-M3 Embedded Trace Macrocell™ Up to 140 I/O ports with interrupt capability: Up to 136 fast I/Os up to 60 MHz Up to 138 5 V-tolerant I/Os Up to 15 communication interfaces Up to three I²C interfaces (SMBus/PMBus) Up to four USARTs and two UARTs (7.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control) Up to three SPIs (30 Mbit/s), two with muxed I²S to achieve audio class accuracy via audio PLL or external PLL 2 × CAN interfaces (2.0B Active) SDIO interface Advanced connectivity USB 2.0 full-speed device/host/OTG controller with on-chip PHY USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII 8- to 14-bit parallel camera interface (48 Mbyte/s max.) CRC calculation unit 96-bit unique ID

In stock

Quantity	$ per unit	Savings
1-9	$12.66	0%
10-24	$9.32	26%
25-249	$8.60	32%
250-539	$8.02	37%
540-10000	$7.80	38%
10000 +	Contact sales

$12.66

Parameters

Supply Voltage Min Volt	1.8
Supply Voltage Max Volt	3.6
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	85.0
Core	Arm Cortex-M3
ECCN US	3A991.a.2
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Industrial
Package Name	LQFP 100 14x14x1.4 mm

Description

Key features

Key features
Core: Arm^® 32-bit Cortex^®-M3 CPU (120 MHz max) with Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution performance from Flash memory, MPU, 150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1) Memories Up to 1 Mbyte of Flash memory 512 bytes of OTP memory Up to 128 + 4 Kbytes of SRAM Flexible static memory controller that supports Compact Flash, SRAM, PSRAM, NOR and NAND memories LCD parallel interface, 8080/6800 modes Clock, reset and supply management From 1.8 to 3.6 V application supply + I/Os POR, PDR, PVD and BOR 4 to 26 MHz crystal oscillator Internal 16 MHz factory-trimmed RC 32 kHz oscillator for RTC with calibration Internal 32 kHz RC with calibration Low-power modes Sleep, Stop and Standby modes V_BAT supply for RTC, 20 × 32 bit backup registers, and optional 4 Kbytes backup SRAM 3 × 12-bit, 0.5 µs ADCs with up to 24 channels and up to 6 MSPS in triple interleaved mode 2 × 12-bit D/A converters General-purpose DMA: 16-stream controller with centralized FIFOs and burst support Up to 17 timers Up to twelve 16-bit and two 32-bit timers, up to 120 MHz, each with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input Debug mode: Serial wire debug (SWD), JTAG, and Cortex^®-M3 Embedded Trace Macrocell™ Up to 140 I/O ports with interrupt capability: Up to 136 fast I/Os up to 60 MHz Up to 138 5 V-tolerant I/Os Up to 15 communication interfaces Up to three I²C interfaces (SMBus/PMBus) Up to four USARTs and two UARTs (7.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control) Up to three SPIs (30 Mbit/s), two with muxed I²S to achieve audio class accuracy via audio PLL or external PLL 2 × CAN interfaces (2.0B Active) SDIO interface Advanced connectivity USB 2.0 full-speed device/host/OTG controller with on-chip PHY USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII 8- to 14-bit parallel camera interface (48 Mbyte/s max.) CRC calculation unit 96-bit unique ID