STM32F303VET6

Mainstream Mixed signals MCUs Arm Cortex-M4 core with DSP and FPU, 512 Kbytes of Flash memory, 72 MHz CPU, MPU, CCM, 12-bit ADC 5 MSPS, PGA, comparators

Parameters

Supply Voltage Min Volt	2.0
Supply Voltage Max Volt	3.6
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	85.0
Core	Arm Cortex-M4
ECCN US	3A991.a.2
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Industrial
Package Name	LQFP 100 14x14x1.4 mm

Description

The STM32F303xD/E family is based on the high-performance ARM®Cortex®-M4 32-bit RISC core with FPU operating at a frequency of 72 MHz, and embedding a floating point unit (FPU), a memory protection unit (MPU) and an embedded trace macrocell (ETM). The family incorporates high-speed embedded...
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Key features

Key features
Core: ARM^®Cortex^®-M4 32-bit CPU with 72 MHz FPU, single-cycle multiplication and HW division, 90 DMIPS (from CCM), DSP instruction and MPU (memory protection unit) Operating conditions: V_DD, V_DDAvoltage range: 2.0 V to 3.6 V Memories Up to 512 Kbytes of Flash memory 64 Kbytes of SRAM, with HW parity check implemented on the first 32 Kbytes. Routine booster: 16 Kbytes of SRAM on instruction and data bus, with HW parity check (CCM) Flexible memory controller (FSMC) for static memories, with four Chip Select CRC calculation unit Reset and supply management Power-on/Power-down reset (POR/PDR) Programmable voltage detector (PVD) Low-power modes: Sleep, Stop and Standby V_BATsupply for RTC and backup registers Clock management 4 to 32 MHz crystal oscillator 32 kHz oscillator for RTC with calibration Internal 8 MHz RC with x 16 PLL option Internal 40 kHz oscillator Up to 115 fast I/Os All mappable on external interrupt vectors Several 5 V-tolerant Interconnect matrix 12-channel DMA controller Four ADCs 0.20 μs (up to 40 channels) with selectable resolution of 12/10/8/6 bits, 0 to 3.6 V conversion range, separate analog supply from 2.0 to 3.6 V Two 12-bit DAC channels with analog supply from 2.4 to 3.6 V Seven ultra-fast rail-to-rail analog comparators with analog supply from 2.0 to 3.6 V Four operational amplifiers that can be used in PGA mode, all terminals accessible with analog supply from 2.4 to 3.6 V Up to 24 capacitive sensing channels supporting touchkey, linear and rotary touch sensors Up to 14 timers: One 32-bit timer and two 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input Three 16-bit 6-channel advanced-control timers, with up to six PWM channels, deadtime generation and emergency stop One 16-bit timer with two IC/OCs, one OCN/PWM, deadtime generation and emergency stop Two 16-bit timers with IC/OC/OCN/PWM, deadtime generation and emergency stop Two watchdog timers (independent, window) One SysTick timer: 24-bit downcounter Two 16-bit basic timers to drive the DAC Calendar RTC with Alarm, periodic wakeup from Stop/Standby Communication interfaces CAN interface (2.0B Active) Three I²C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from STOP Up to five USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control) Up to four SPIs, 4 to 16 programmable bit frames, two with multiplexed half/full duplex I²S interface USB 2.0 full-speed interface with LPM support Infrared transmitter SWD, Cortex^®-M4 with FPU ETM, JTAG 96-bit unique ID

In stock

Quantity	$ per unit	Savings
1-9	$8.97	0%
10-24	$7.13	20%
25-99	$6.60	26%
100-249	$6.47	28%
250-10000	$6.21	31%
10000 +	Contact sales

$8.97

Parameters

Supply Voltage Min Volt	2.0
Supply Voltage Max Volt	3.6
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	85.0
Core	Arm Cortex-M4
ECCN US	3A991.a.2
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Industrial
Package Name	LQFP 100 14x14x1.4 mm

Description

Key features

Key features
Core: ARM^®Cortex^®-M4 32-bit CPU with 72 MHz FPU, single-cycle multiplication and HW division, 90 DMIPS (from CCM), DSP instruction and MPU (memory protection unit) Operating conditions: V_DD, V_DDAvoltage range: 2.0 V to 3.6 V Memories Up to 512 Kbytes of Flash memory 64 Kbytes of SRAM, with HW parity check implemented on the first 32 Kbytes. Routine booster: 16 Kbytes of SRAM on instruction and data bus, with HW parity check (CCM) Flexible memory controller (FSMC) for static memories, with four Chip Select CRC calculation unit Reset and supply management Power-on/Power-down reset (POR/PDR) Programmable voltage detector (PVD) Low-power modes: Sleep, Stop and Standby V_BATsupply for RTC and backup registers Clock management 4 to 32 MHz crystal oscillator 32 kHz oscillator for RTC with calibration Internal 8 MHz RC with x 16 PLL option Internal 40 kHz oscillator Up to 115 fast I/Os All mappable on external interrupt vectors Several 5 V-tolerant Interconnect matrix 12-channel DMA controller Four ADCs 0.20 μs (up to 40 channels) with selectable resolution of 12/10/8/6 bits, 0 to 3.6 V conversion range, separate analog supply from 2.0 to 3.6 V Two 12-bit DAC channels with analog supply from 2.4 to 3.6 V Seven ultra-fast rail-to-rail analog comparators with analog supply from 2.0 to 3.6 V Four operational amplifiers that can be used in PGA mode, all terminals accessible with analog supply from 2.4 to 3.6 V Up to 24 capacitive sensing channels supporting touchkey, linear and rotary touch sensors Up to 14 timers: One 32-bit timer and two 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input Three 16-bit 6-channel advanced-control timers, with up to six PWM channels, deadtime generation and emergency stop One 16-bit timer with two IC/OCs, one OCN/PWM, deadtime generation and emergency stop Two 16-bit timers with IC/OC/OCN/PWM, deadtime generation and emergency stop Two watchdog timers (independent, window) One SysTick timer: 24-bit downcounter Two 16-bit basic timers to drive the DAC Calendar RTC with Alarm, periodic wakeup from Stop/Standby Communication interfaces CAN interface (2.0B Active) Three I²C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from STOP Up to five USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control) Up to four SPIs, 4 to 16 programmable bit frames, two with multiplexed half/full duplex I²S interface USB 2.0 full-speed interface with LPM support Infrared transmitter SWD, Cortex^®-M4 with FPU ETM, JTAG 96-bit unique ID