|Supply Voltage Min Volt||1.7|
|Supply Voltage Max Volt||3.6|
|Operating Temp Min Celsius||-40.0|
|Operating Temp Max Celsius||85.0|
|ROHS Compliance Grade||Ecopack2|
|Package Name||LQFP 208 28x28x1.4|
The STM32F469xx devices are based on the high-performance Arm®1 Cortex®-M4 32-bit RISC core operating at a frequency of up to 180 MHz. The Cortex®-M4 core features a Floating point unit (FPU) single precision which supports all Arm® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.
The STM32F469xx devices incorporate high-speed embedded memories (Flash memory up to 2 Mbytes, up to 384 Kbytes of SRAM), up to 4 Kbytes of backup SRAM, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.
All devices offer three 12-bit ADCs, two DACs, a low-power RTC, twelve general-purpose 16-bit timers including two PWM timers for motor control, two general-purpose 32-bit timers, and a true random number generator (RNG). They also feature standard and advanced communication interfaces:
Advanced peripherals include an SDMMC interface, a flexible memory control (FMC) interface, a Quad-SPI Flash memory, and camera interface for CMOS sensors. Refer to Table 2 for the list of peripherals available on each part number.
The STM32F469xx devices operate in the –40 to +105 °C temperature range from a 1.7 to 3.6 V power supply. A dedicated supply input for USB (OTG_FS and OTG_HS) only in full speed mode, is available on all packages.
The supply voltage can drop to 1.7 V (refer to Section 2.19.2). A comprehensive set of power-saving mode allows the design of low-power applications.
The STM32F469xx devices are offered in eight packages, ranging from 100 to 216 pins. The set of included peripherals changes with the device chosen, according to Table 2.
These features make the STM32F469xx microcontrollers suitable for a wide range of applications:
Figure 5 shows the general block diagram of the device family.