STM32WL3RKBV6X

Sub-GHz Wireless Microcontrollers. Sing-core Arm Cortex-M0+ @64 MHz with 128 Kbytes of Flash memory, 16 Kbytes of SRAM. 2(G)FSK, 4(G)FSK, OOK, ASK, D-BPSK, DSSS modulation I/Q channel interface. AES 128. Multiprotocol System-on-Chip.

Parameters

Supply Voltage Min Volt	1.7
Supply Voltage Max Volt	3.6
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	85.0
Core	Arm Cortex-M0+
ECCN US	5A992.c
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Industrial
Package Name	VFQFPN 32 5x5x1.0 mm

Description

The STM32WL3Rxx is a high performance ultra-low power wireless application processor, intended for RF wireless applications in the sub-1 GHz band. It is designed to operate in both the license-free ISM and SRD frequency bands such as 433, 868, and 915 MHz.It adopts a single-core architecture...
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Key features

Key features
Includes ST state-of-the-art patented technology Ultra-low power sub-1GHz wireless system-on-chip Programmable MCU: Core: Arm^® Cortex^®-M0+ 32-bit, running up to 64 MHz Program memory: 64-Kbyte / 128-Kbyte flash memory Data memory: 8-Kbyte / 16-Kbyte SRAM (full retention down to ultra deep stop) Additional storage: 1-Kbyte OTP (user data) Radio Frequency bands: 276 - 319 MHz, 413-479 MHz, 826 - 958 MHz Modulation schemes: 2(G)FSK, 2(G)MSK, 4(G)FSK OOK, ASK D-BPSK DSSS (direct sequence spread spectrum) I/Q channels data access Compatible with proprietary and standardized wireless protocols (wM-Bus, Sigfox, Mioty, KNX-RF, IEEE 802.15.4g, others) Air data rate from 0.1 to 600 kbit/s Programmable TX power: 276 - 319 MHz up to 14 dBm 413 - 479 MHz up to 20 dBm 826 - 958 MHz up to 20 dBm RX sensitivity @ 1% BER: -122 dBm @ 2.4 kbit/s 315 MHz 2(G)FSK -132 dBm @ 300 kbit/s 433 MHz OOK -131 dBm @ 300 kbit/s 868 MHz 2(G)FSK -112 dBm @ 38.4 kbit/s 868 MHz 2(G)FSK Suitable for worldwide certifications: Europe: ETSI EN 300 220, category 1 compliant, ETSI EN 303 131 US: FCC part 15 and part 90 Japan: ARIB STD T67, T108 Fully-configurable hardware sequencer for autonomous radio operations (Sniff mode, Frequency hopping, Low Duty Cycle mode, Listen before talk) Ultra-low power architecture Dynamic current consumption: 14 µA/MHz Shutdown mode with 6 wakeup pins: 14 nA UltraDeepstop mode: 418 nA (at 25 °C), 1.2 µA (at 85 °C) with RAM0 (16 Kbyte) retained 6 wakeup pins The following functions are not supported in UltraDeepstop mode: MR_SUBGHz, LPUART, RTC, IWDG, DAC No internal wakeup capabilities support in this power mode Deepstop mode: 1.123 µA at (at 25 °C), 4.176 µA (at 85 °C) with: RAM0 (16 Kbyte) IWDG RTC with LSE SoC consumption: 1.3 mA current in WFI conditions (direct HSE mode) Radio only consumption: 4 mA in RX 8 mA in TX @ +10 dBm 78 mA in TX @ +20 dBm Consumption: 1.3 mA current in WFI conditions (direct HSE mode) Wakeup capability from both Deepstop and Shutdown modes Peripherals and analog front-end 12-bit ADC: up to 1 Msample/s with 8 single ended channels (or 4 differentials) Battery voltage monitoring with low-level detection Temperature monitoring Communication interfaces Up to 18 GPIOs (VFQFPN32), all with retention capability 1x USART. Supports of LIN, Smartcard Protocol, IrDA, SIR ENDEC specifications, and modem operations (CTS/RTS) 1x LPUART (available also in low-power mode), with wakeup capability 1 x SPI with I2S interface multiplexed 1x I2C (SMBus/PMBus) 1x DMA 8 channels controller, supporting ADC, SPIs, I2Cs, USART, LPUART, timers, AES Clock sources and timers Flexible clocking scheme, featuring: 64 MHz (HSI or PLL) Fail-safe 48 MHz crystal oscillator (HSE), with integrated trimming capacitors 32 kHz crystal oscillator (LSE) Integrated low-power 32 kHz RC (LSI) 1x 16-bits, four channels general purpose timer 1x 16-bits, two channels general purpose timer 1x RTC 1x independent watchdog Radio timer with wakeup capability Security Secure bootloader with SWD disabling AES-128 co-processor and 16-bit TRNG Embedded UART bootloader with selectable write and read-out protection Operating range and reset Ultra-low-power power-on-reset (POR) and power-down-reset (PDR) Programmable voltage detector (PVD) Supply voltage: from 1.7 to 3.6 V Temperature range: -40 ºC to 105 ºC All packages are ECOPACK2 compliant

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Quantity	$ per unit	Savings
1-9	$4.63	0%
10-24	$3.08	34%
25-99	$2.84	39%
100-249	$2.47	47%
250-499	$2.34	49%
500	$2.11	54%
500 +	Contact sales

$4.63

Parameters

Supply Voltage Min Volt	1.7
Supply Voltage Max Volt	3.6
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	85.0
Core	Arm Cortex-M0+
ECCN US	5A992.c
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Industrial
Package Name	VFQFPN 32 5x5x1.0 mm

Description

Key features

Key features
Includes ST state-of-the-art patented technology Ultra-low power sub-1GHz wireless system-on-chip Programmable MCU: Core: Arm^® Cortex^®-M0+ 32-bit, running up to 64 MHz Program memory: 64-Kbyte / 128-Kbyte flash memory Data memory: 8-Kbyte / 16-Kbyte SRAM (full retention down to ultra deep stop) Additional storage: 1-Kbyte OTP (user data) Radio Frequency bands: 276 - 319 MHz, 413-479 MHz, 826 - 958 MHz Modulation schemes: 2(G)FSK, 2(G)MSK, 4(G)FSK OOK, ASK D-BPSK DSSS (direct sequence spread spectrum) I/Q channels data access Compatible with proprietary and standardized wireless protocols (wM-Bus, Sigfox, Mioty, KNX-RF, IEEE 802.15.4g, others) Air data rate from 0.1 to 600 kbit/s Programmable TX power: 276 - 319 MHz up to 14 dBm 413 - 479 MHz up to 20 dBm 826 - 958 MHz up to 20 dBm RX sensitivity @ 1% BER: -122 dBm @ 2.4 kbit/s 315 MHz 2(G)FSK -132 dBm @ 300 kbit/s 433 MHz OOK -131 dBm @ 300 kbit/s 868 MHz 2(G)FSK -112 dBm @ 38.4 kbit/s 868 MHz 2(G)FSK Suitable for worldwide certifications: Europe: ETSI EN 300 220, category 1 compliant, ETSI EN 303 131 US: FCC part 15 and part 90 Japan: ARIB STD T67, T108 Fully-configurable hardware sequencer for autonomous radio operations (Sniff mode, Frequency hopping, Low Duty Cycle mode, Listen before talk) Ultra-low power architecture Dynamic current consumption: 14 µA/MHz Shutdown mode with 6 wakeup pins: 14 nA UltraDeepstop mode: 418 nA (at 25 °C), 1.2 µA (at 85 °C) with RAM0 (16 Kbyte) retained 6 wakeup pins The following functions are not supported in UltraDeepstop mode: MR_SUBGHz, LPUART, RTC, IWDG, DAC No internal wakeup capabilities support in this power mode Deepstop mode: 1.123 µA at (at 25 °C), 4.176 µA (at 85 °C) with: RAM0 (16 Kbyte) IWDG RTC with LSE SoC consumption: 1.3 mA current in WFI conditions (direct HSE mode) Radio only consumption: 4 mA in RX 8 mA in TX @ +10 dBm 78 mA in TX @ +20 dBm Consumption: 1.3 mA current in WFI conditions (direct HSE mode) Wakeup capability from both Deepstop and Shutdown modes Peripherals and analog front-end 12-bit ADC: up to 1 Msample/s with 8 single ended channels (or 4 differentials) Battery voltage monitoring with low-level detection Temperature monitoring Communication interfaces Up to 18 GPIOs (VFQFPN32), all with retention capability 1x USART. Supports of LIN, Smartcard Protocol, IrDA, SIR ENDEC specifications, and modem operations (CTS/RTS) 1x LPUART (available also in low-power mode), with wakeup capability 1 x SPI with I2S interface multiplexed 1x I2C (SMBus/PMBus) 1x DMA 8 channels controller, supporting ADC, SPIs, I2Cs, USART, LPUART, timers, AES Clock sources and timers Flexible clocking scheme, featuring: 64 MHz (HSI or PLL) Fail-safe 48 MHz crystal oscillator (HSE), with integrated trimming capacitors 32 kHz crystal oscillator (LSE) Integrated low-power 32 kHz RC (LSI) 1x 16-bits, four channels general purpose timer 1x 16-bits, two channels general purpose timer 1x RTC 1x independent watchdog Radio timer with wakeup capability Security Secure bootloader with SWD disabling AES-128 co-processor and 16-bit TRNG Embedded UART bootloader with selectable write and read-out protection Operating range and reset Ultra-low-power power-on-reset (POR) and power-down-reset (PDR) Programmable voltage detector (PVD) Supply voltage: from 1.7 to 3.6 V Temperature range: -40 ºC to 105 ºC All packages are ECOPACK2 compliant