STM8AL3LE8ATAY

Automotive 8-bit ultra-low-power MCU with 64 Kbytes Flash, LIN, RTC, LCD, data EEPROM, timers, USARTs, I2C, SPIs, ADC, DAC, COMPs, AES

Parameters

Supply Voltage Min Volt	1.8
Supply Voltage Max Volt	3.6
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	85.0
Core	STM8
ECCN US	5A992.c
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Automotive
Package Name	LQFP 80 14x14x1.4 mm

Description

The high-density STM8AL3xE8x ultra-low-power devices feature an enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture...
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Key features

Key features
AEC-Q100 grade 1 qualified Operating conditions Operating power supply range 1.8 V to 3.6 V (down to 1.65 V at power down) Temp. range: -40 to 85 or 125 °C Low-power features 5 low-power modes: Wait, Low-power run (5.9 μA), Low-power wait (3 μA), Active-halt with full RTC (1.4 μA), Halt (400 nA) Consumption: 200 μA/MHz+330 μA Fast wake up from Halt mode (4.7 μs) Ultra-low leakage per I/0: 50 nA Advanced STM8 core Harvard architecture and 3-stage pipeline Max freq: 16 MHz, 16 CISC MIPS peak Up to 40 external interrupt sources Reset and supply management Low power, ultra safe BOR reset with 5 programmable thresholds Ultra-low-power POR/PDR Programmable voltage detector (PVD) Clock management 32 kHz and 1-16 MHz crystal oscillators Internal 16 MHz factory-trimmed RC and 38 kHz low consumption RC Clock security system Low-power RTC BCD calendar with alarm interrupt, Digital calibration with +/- 0.5ppm accuracy Advanced anti-tamper detection DMA 4 ch. for ADC, encryption hardware accelerator (AES), DACs, SPIs, I²C, USARTs, Timers, 1 ch. for memory-to-memory LCD: 8x40 or 4x44 w/ step-up converter 12-bit ADC up to 1 Msps / 28 channels, Temp. sensor and internal ref. voltage Memories Up to 64 Kbytes of Flash with up to 2 Kbytes of data EEPROM with ECC and RWW Flexible write/read protection modes Up to 4 Kbytes of RAM 2x12-bit DAC (dual mode) with output buffer 2 ultra-low-power comparators 1 with fixed threshold and 1 rail to rail Wakeup capability Timers Three 16-bit timers with 2 channels (IC, OC, PWM), quadrature encoder One 16-bit advanced control timer with 3 channels, supporting motor control One 8-bit timer with 7-bit prescaler One window and one independent watchdog Beeper timer with 1, 2 or 4 kHz frequencies Communication interfaces Two synchronous serial interface (SPI) Fast I²C 400 kHz SMBus and PMBus Three USARTs (IrDA, LIN 1.3, LIN2.0) Up to 67 I/Os, all mappable on interrupt vectors Fast on-chip programming and non-intrusive debugging with SWIM, Bootloader using USART 96-bit unique ID

In stock

Quantity	$ per unit	Savings
1-9	$6.01	0%
10-99	$5.40	10%
100-249	$4.42	26%
250-539	$4.19	30%
540-1079	$4.03	33%
1080-2699	$3.51	42%
2700-10000	$3.42	43%
10000 +	Contact sales

$6.01

Parameters

Supply Voltage Min Volt	1.8
Supply Voltage Max Volt	3.6
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	85.0
Core	STM8
ECCN US	5A992.c
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Automotive
Package Name	LQFP 80 14x14x1.4 mm

Description

Key features

Key features
AEC-Q100 grade 1 qualified Operating conditions Operating power supply range 1.8 V to 3.6 V (down to 1.65 V at power down) Temp. range: -40 to 85 or 125 °C Low-power features 5 low-power modes: Wait, Low-power run (5.9 μA), Low-power wait (3 μA), Active-halt with full RTC (1.4 μA), Halt (400 nA) Consumption: 200 μA/MHz+330 μA Fast wake up from Halt mode (4.7 μs) Ultra-low leakage per I/0: 50 nA Advanced STM8 core Harvard architecture and 3-stage pipeline Max freq: 16 MHz, 16 CISC MIPS peak Up to 40 external interrupt sources Reset and supply management Low power, ultra safe BOR reset with 5 programmable thresholds Ultra-low-power POR/PDR Programmable voltage detector (PVD) Clock management 32 kHz and 1-16 MHz crystal oscillators Internal 16 MHz factory-trimmed RC and 38 kHz low consumption RC Clock security system Low-power RTC BCD calendar with alarm interrupt, Digital calibration with +/- 0.5ppm accuracy Advanced anti-tamper detection DMA 4 ch. for ADC, encryption hardware accelerator (AES), DACs, SPIs, I²C, USARTs, Timers, 1 ch. for memory-to-memory LCD: 8x40 or 4x44 w/ step-up converter 12-bit ADC up to 1 Msps / 28 channels, Temp. sensor and internal ref. voltage Memories Up to 64 Kbytes of Flash with up to 2 Kbytes of data EEPROM with ECC and RWW Flexible write/read protection modes Up to 4 Kbytes of RAM 2x12-bit DAC (dual mode) with output buffer 2 ultra-low-power comparators 1 with fixed threshold and 1 rail to rail Wakeup capability Timers Three 16-bit timers with 2 channels (IC, OC, PWM), quadrature encoder One 16-bit advanced control timer with 3 channels, supporting motor control One 8-bit timer with 7-bit prescaler One window and one independent watchdog Beeper timer with 1, 2 or 4 kHz frequencies Communication interfaces Two synchronous serial interface (SPI) Fast I²C 400 kHz SMBus and PMBus Three USARTs (IrDA, LIN 1.3, LIN2.0) Up to 67 I/Os, all mappable on interrupt vectors Fast on-chip programming and non-intrusive debugging with SWIM, Bootloader using USART 96-bit unique ID