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The ST25R3912 is a highly integrated NFC initiator / HF reader IC, including the analog front end (AFE) and a highly integrated data framing system for ISO 18092 (NFCIP-1) initiator, ISO 18092 (NFCIP-1) active target, ISO 14443A and B reader (including high bit rates), ISO 15693 reader and FeliCa™ reader. Implementation of other standard and custom protocols like MIFARE™ Classic is possible using the AFE and implementing framing in the external microcontroller (Stream and Transparent modes).
The ST25R3912 is positioned perfectly for the infrastructure side of the NFC system, where users need optimal RF performance and flexibility combined with low power.
The device is optimized for applications with directly driven antennas. The ST25R3912 is alone in the domain of HF reader ICs as it contains two differential low impedance (1 Ohm) antenna drivers.
The ST25R3912 includes several features that make it very suited for low power applications. The presence of a card can be detected by performing a measurement of amplitude or phase of signal on antenna LC tank, and comparing it to the stored reference. It also contain a low power RC oscillator and wake-up timer that can be used to wake up the system after a defined time period, and to check for the presence of a tag using one or more low power detection techniques (phase or amplitude).
The ST25R3912 is designed to operate from a wide (2.4 to 5.5 V) power supply range; peripheral interface IO pins support power supply range from 1.65 to 5.5 V.
