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STM32H503KBU7TR

STM32H503KBU7TR

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STM32H503KBU7

High-performance, Arm Cortex-M33, MCU with 128-Kbyte Flash, 32-Kbyte RAM, 250 MHz CPU

Supply Voltage Min Volt1.62
Supply Voltage Max Volt3.6
Operating Temp Min Celsius-40.0
Operating Temp Max Celsius105.0
CoreArm Cortex-M33
ECCN US3A991.a.2
ECCN EUNEC
Packing TypeTray
RoHs compliantEcopack2
GradeIndustrial
Package NameUFQFPN 32 5x5x0.55 mm

The STM32H503xx devices are a high-performance microcontrollers family (STM32H5 series) based on the high-performance Arm® Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 250 MHz.The Cortex®-M33 core features a single-precision floating-point unit (FPU) that supports all the...
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Key features
  • Core
    • Arm® Cortex®-M33 CPU with FPU, frequency up to 250 MHz, MPU, 375 DMIPS (Dhrystone 2.1), and DSP instructions
  • ART Accelerator
    • 8-Kbyte instruction cache allowing 0-wait-state execution from flash memory (frequency up to 250 MHz)
  • Benchmarks
    • 1.5 DMIPS/MHz (Drystone 2.1)
    • 1023 CoreMark® (4.092 CoreMark®/MHz)
  • Memories
    • 128 Kbytes of embedded flash memory with ECC, two banks of read-while-write
    • 2-Kbyte OTP (one-time programmable)
    • 32-Kbyte SRAM with ECC
    • 2 Kbytes of backup SRAM (available in the lowest power modes)
  • Clock, reset, and supply management
    • 1.71 V to 3.6 V application supply and I/O
    • POR, PDR, PVD, and BOR
    • Embedded regulator (LDO)
    • Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
    • Two PLLs for system clock, USB, audio, and ADC
    • External oscillators: 4 to 50 MHz HSE, 32.768 kHz LSE
  • Low-power modes
    • Sleep, Stop and Standby modes
    • VBAT supply for RTC, 32 backup registers (32 bits)
  • General-purpose inputs/outputs
    • Up to 49 fast I/Os with interrupt capability (most 5 V tolerant)
    • Up to 9 I/Os with independent supply down to 1.08 V
  • Analog
    • One 12-bit ADC, up to 2.5 MSPS
    • One 12-bit dual-channel DAC
    • One ultra-low-power comparator
    • One operational amplifier (7 MHz bandwidth)
  • One digital temperature sensor
  • Up to 11 timers
    • Six 16-bit (including two low-power 16-bit timer available in Stop mode) and one 32-bit timer
    • Two watchdogs
    • One SysTick timer
    • RTC with hardware calendar, alarms, and calibration
  • Communication interfaces
    • Up to two I2Cs FM + interfaces (SMBus/PMBus®)
    • Up to two I3Cs shared with I2C
    • Up to three USARTs (ISO7816 interface, LIN, IrDA, modem control) and one LPUART
    • Up to three SPIs including three muxed with full-duplex I2S for audio class accuracy via internal audio PLL or external clock and up to three additional SPI from three USART when configured in synchronous mode
    • One FDCAN
    • One USB 2.0 full-speed host and device
  • Two DMA controllers to offload the CPU
  • Security
    • HASH (SHA-1, SHA-2), HMAC
    • True random generator
    • 96-bit unique ID
    • Active tamper
  • Debug
    • Authenticated debug
    • Serial wire-debug (SWD) and JTAG interfaces
  • ECOPACK2 compliant packages
Out of Stock
Quantity $ per unit Savings
1-9$3.690%
10-99$3.3110%
100-249$2.7226%
250-499$2.5830%
500$2.3137%
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$3.68
Supply Voltage Min Volt1.62
Supply Voltage Max Volt3.6
Operating Temp Min Celsius-40.0
Operating Temp Max Celsius105.0
CoreArm Cortex-M33
ECCN US3A991.a.2
ECCN EUNEC
Packing TypeTray
RoHs compliantEcopack2
GradeIndustrial
Package NameUFQFPN 32 5x5x0.55 mm

The STM32H503xx devices are a high-performance microcontrollers family (STM32H5 series) based on the high-performance Arm® Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 250 MHz.The Cortex®-M33 core features a single-precision floating-point unit (FPU) that supports all the...
Read More

Key features
  • Core
    • Arm® Cortex®-M33 CPU with FPU, frequency up to 250 MHz, MPU, 375 DMIPS (Dhrystone 2.1), and DSP instructions
  • ART Accelerator
    • 8-Kbyte instruction cache allowing 0-wait-state execution from flash memory (frequency up to 250 MHz)
  • Benchmarks
    • 1.5 DMIPS/MHz (Drystone 2.1)
    • 1023 CoreMark® (4.092 CoreMark®/MHz)
  • Memories
    • 128 Kbytes of embedded flash memory with ECC, two banks of read-while-write
    • 2-Kbyte OTP (one-time programmable)
    • 32-Kbyte SRAM with ECC
    • 2 Kbytes of backup SRAM (available in the lowest power modes)
  • Clock, reset, and supply management
    • 1.71 V to 3.6 V application supply and I/O
    • POR, PDR, PVD, and BOR
    • Embedded regulator (LDO)
    • Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
    • Two PLLs for system clock, USB, audio, and ADC
    • External oscillators: 4 to 50 MHz HSE, 32.768 kHz LSE
  • Low-power modes
    • Sleep, Stop and Standby modes
    • VBAT supply for RTC, 32 backup registers (32 bits)
  • General-purpose inputs/outputs
    • Up to 49 fast I/Os with interrupt capability (most 5 V tolerant)
    • Up to 9 I/Os with independent supply down to 1.08 V
  • Analog
    • One 12-bit ADC, up to 2.5 MSPS
    • One 12-bit dual-channel DAC
    • One ultra-low-power comparator
    • One operational amplifier (7 MHz bandwidth)
  • One digital temperature sensor
  • Up to 11 timers
    • Six 16-bit (including two low-power 16-bit timer available in Stop mode) and one 32-bit timer
    • Two watchdogs
    • One SysTick timer
    • RTC with hardware calendar, alarms, and calibration
  • Communication interfaces
    • Up to two I2Cs FM + interfaces (SMBus/PMBus®)
    • Up to two I3Cs shared with I2C
    • Up to three USARTs (ISO7816 interface, LIN, IrDA, modem control) and one LPUART
    • Up to three SPIs including three muxed with full-duplex I2S for audio class accuracy via internal audio PLL or external clock and up to three additional SPI from three USART when configured in synchronous mode
    • One FDCAN
    • One USB 2.0 full-speed host and device
  • Two DMA controllers to offload the CPU
  • Security
    • HASH (SHA-1, SHA-2), HMAC
    • True random generator
    • 96-bit unique ID
    • Active tamper
  • Debug
    • Authenticated debug
    • Serial wire-debug (SWD) and JTAG interfaces
  • ECOPACK2 compliant packages