STM32H573MIY3QTR

The STM32H573xx devices are a high-performance microcontrollers family (STM32H5 Series) based on the high-performance Arm^® Cortex^®-M33 32-bit RISC core. They operate at a frequency of up to 250 MHz.

The Cortex^®-M33 core features a single-precision floating-point unit (FPU), that supports all the Arm^® single-precision data-processing instructions and all the data types.

The Cortex^®-M33 core also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) that enhances the application security.

The devices embed high-speed memories (2 Mbytes of dual bank flash memory and 640 Kbytes of SRAM), a flexible external memory controller (FMC) (for devices with packages of 100 pins and more), one Octo-SPI memory interface (at least one Quad-SPI available on all packages) and an extensive range of enhanced I/Os and peripherals connected to three APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.

The devices offer security foundation compliant with the trusted-based security architecture (TBSA) requirements from Arm^®. It embeds the necessary security features to implement a secure boot, secure data storage and secure firmware update. Besides these capabilities, the devices incorporate a secure firmware installation feature, that allows the customer to secure the provisioning of the code during its production. A flexible life cycle is managed thanks to multiple levels of protection and secure debug authentication. Firmware hardware isolation is supported thanks to securable peripherals, memories and I/Os, and privilege configuration of peripherals and memories.

The devices feature several protection mechanisms for embedded flash memory and SRAM: readout protection, write protection, secure and hide protection areas.

The devices embed several peripherals reinforcing security: a fast AES coprocessor, a secure AES coprocessor with DPA resistance and hardware unique key that can be shared by hardware with fast AES, a public key accelerator (PKA), DPA resistant an on-the-fly decryption engine for Octo-SPI external memories, a HASH hardware accelerator, and a true random number generator

The devices offer active tamper detection and protection against transient and environmental perturbation attacks, thanks to several internal monitoring generating secret data erase in case of attack. This helps to fit the PCI requirements for point of sales applications.

The devices offer two fast 12-bit ADC, two DAC channels, an internal voltage reference buffer, a low-power RTC, two 32-bit general-purpose timers, two 16-bit PWM timers dedicated to motor control, eight 16-bit general-purpose timers, two 16-bit basic timers and six 16-bit low-power timers.

The devices also feature standard and advanced communication interfaces such as: four I²Cs, one I3C, six SPIs, three I2Ss, six USARTs, six UARTs and one low-power UART, two SAIs, one digital camera interface (DCMI), up to two SDMMC, two FDCAN, one USB full-speed, one USB Type-C™ /USB Power Delivery controller.

The devices operate in the - 40 to + 85 °C (+ 130 °C junction) and - 40 to + 125 °C (+ 130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply.

A comprehensive set of power-saving modes allow the design of low-power applications.

Some independent power supplies are supported like an analog independent supply input for ADC, DACs, a 3.3 V dedicated supply input for USB and a dedicated supply input for some GPIOs and SDMMC. A VBAT input is available for connecting a backup battery in order to preserve the RTC functionality and to backup 32x 32-bit registers and 4-Kbyte SRAM.

The devices offer eight packages from 64-pin to 176-pin.

All packages are available with two options LDO or SMPS supply for the V_CORE (except for LQFP64 and VFQFPN68 packages which are not available in SMPS and WLCSP80 which is not available in LDO).