STM32MP153CAC3

STM32MP153CAC3

Active

STM32MP153CAB3

MPU with Arm Dual Cortex-A7 650 MHz, Arm Cortex-M4 real-time coprocessor, TFT display, FD-CAN, Secure boot and Cryptography

Supply Voltage Min Volt1.71
Supply Voltage Max Volt3.6
Operating Temp Min Celsius-40.0
Operating Temp Max Celsius125.0
CoreArm Cortex-A7
ECCN US5A992.c
ECCN EUNEC
Packing TypeTray
RoHs compliantEcopack2
GradeIndustrial
Package NameLFBGA 354 16x16x1.7 P 0.8 mm

The STM32MP153C/F devices are based on the high-performance dual-core Arm® Cortex®-A7 32-bit RISC core operating at up to 800 MHz. The Cortex-A7 processor includes a 32-Kbyte L1 instruction cache for each CPU, a 32-Kbyte L1 data cache for each CPU and a 256-Kbyte level2 cache. The Cortex-A7...
Read More

Key features
  • Core
    • 32-bit dual-core Arm® Cortex®-A7
      • L1 32-Kbyte I / 32-Kbyte D for each core

      • 256-Kbyte unified level 2 cache

      • Arm® NEON™ and Arm® TrustZone®

    • 32-bit Arm® Cortex®-M4 with FPU/MPU
      • Up to 209 MHz (Up to 703 CoreMark®)

  • Memories
    • External DDR memory up to 1 Gbyte
      • up to LPDDR2/LPDDR3-1066 16/32-bit

      • up to DDR3/DDR3L-1066 16/32-bit

    • 708 Kbytes of internal SRAM: 256 Kbytes of AXI SYSRAM + 384 Kbytes of AHB SRAM + 64 Kbytes of AHB SRAM in Backup domain and 4 Kbytes of SRAM in Backup domain
    • Dual mode Quad-SPI memory interface
    • Flexible external memory controller with up to 16-bit data bus: parallel interface to connect external ICs and SLC NAND memories with up to 8-bit ECC
  • Security/safety
    • Secure boot, TrustZone® peripherals, active tamper
    • Cortex®-M4 resources isolation
  • Reset and power management
    • 1.71 V to 3.6 V I/Os supply (5 V-tolerant I/Os)
    • POR, PDR, PVD and BOR
    • On-chip LDOs (RETRAM, BKPSRAM, USB 1.8 V, 1.1 V)
    • Backup regulator (~0.9 V)
    • Internal temperature sensors
    • Low-power modes: Sleep, Stop and Standby
    • DDR memory retention in Standby mode
    • Controls for PMIC companion chip
  • Low-power consumption
    • Total current consumption down to 2 µA (Standby mode, no RTC, no LSE, no BKPSRAM, no RETRAM)
  • Clock management
    • Internal oscillators: 64 MHz HSI oscillator, 4 MHz CSI oscillator, 32 kHz LSI oscillator
    • Exter
Out of Stock
Quantity $ per unit Savings
1-9$15.090%
10-24$13.898%
25-99$13.1513%
100-249$11.6323%
250-503$11.0127%
504-10000$8.7042%
Contact sales
$15.09
Supply Voltage Min Volt1.71
Supply Voltage Max Volt3.6
Operating Temp Min Celsius-40.0
Operating Temp Max Celsius125.0
CoreArm Cortex-A7
ECCN US5A992.c
ECCN EUNEC
Packing TypeTray
RoHs compliantEcopack2
GradeIndustrial
Package NameLFBGA 354 16x16x1.7 P 0.8 mm

The STM32MP153C/F devices are based on the high-performance dual-core Arm® Cortex®-A7 32-bit RISC core operating at up to 800 MHz. The Cortex-A7 processor includes a 32-Kbyte L1 instruction cache for each CPU, a 32-Kbyte L1 data cache for each CPU and a 256-Kbyte level2 cache. The Cortex-A7...
Read More

Key features
  • Core
    • 32-bit dual-core Arm® Cortex®-A7
      • L1 32-Kbyte I / 32-Kbyte D for each core

      • 256-Kbyte unified level 2 cache

      • Arm® NEON™ and Arm® TrustZone®

    • 32-bit Arm® Cortex®-M4 with FPU/MPU
      • Up to 209 MHz (Up to 703 CoreMark®)

  • Memories
    • External DDR memory up to 1 Gbyte
      • up to LPDDR2/LPDDR3-1066 16/32-bit

      • up to DDR3/DDR3L-1066 16/32-bit

    • 708 Kbytes of internal SRAM: 256 Kbytes of AXI SYSRAM + 384 Kbytes of AHB SRAM + 64 Kbytes of AHB SRAM in Backup domain and 4 Kbytes of SRAM in Backup domain
    • Dual mode Quad-SPI memory interface
    • Flexible external memory controller with up to 16-bit data bus: parallel interface to connect external ICs and SLC NAND memories with up to 8-bit ECC
  • Security/safety
    • Secure boot, TrustZone® peripherals, active tamper
    • Cortex®-M4 resources isolation
  • Reset and power management
    • 1.71 V to 3.6 V I/Os supply (5 V-tolerant I/Os)
    • POR, PDR, PVD and BOR
    • On-chip LDOs (RETRAM, BKPSRAM, USB 1.8 V, 1.1 V)
    • Backup regulator (~0.9 V)
    • Internal temperature sensors
    • Low-power modes: Sleep, Stop and Standby
    • DDR memory retention in Standby mode
    • Controls for PMIC companion chip
  • Low-power consumption
    • Total current consumption down to 2 µA (Standby mode, no RTC, no LSE, no BKPSRAM, no RETRAM)
  • Clock management
    • Internal oscillators: 64 MHz HSI oscillator, 4 MHz CSI oscillator, 32 kHz LSI oscillator
    • Exter