STM32WB15CCU7

STM32WB15CCU7

Active

STM32WB15CCY6TR

Ultra-low-power dual core Arm Cortex-M4 MCU 64 MHz, Cortex-M0+ 32 MHz with 320 Kbytes of Flash memory, Bluetooth LE 5.3, AES-256

Supply Voltage Min Volt1.71
Supply Voltage Max Volt3.6
Operating Temp Min Celsius-40.0
Operating Temp Max Celsius85.0
Operating Voltage Min Volt1.71
Operating Voltage Max Volt3.6
CoreArm Cortex-M4
ECCN US5A992.c
ECCN EUNEC
Packing TypeTape And Reel
RoHs compliantEcopack2
GradeIndustrial
Package NameWLCSP 49 3.3x3.4x0.6 P 0.4 mm

The STM32WB15CC multiprotocol wireless and ultra-low-power device embeds a powerful and ultra-low-power radio compliant with the Bluetooth® Low Energy SIG specification 5.4. It contains a dedicated Arm® Cortex®-M0+ for performing all the real-time low layer operation.The device is designed to be...
Read More

Key features
  • Include ST state-of-the-art patented technology
  • Radio
    • 2.4 GHz
    • RF transceiver supporting Bluetooth® 5.4 specification
    • RX sensitivity: -95.5 dBm (Bluetooth® Low Energy at 1 Mbps)
    • Programmable output power up to +5.5 dBm with 1 dB steps
    • Integrated balun to reduce BOM
    • Support for 2 Mbps
    • Support GATT caching
    • Support EATT (enhanced ATT)
    • Dedicated Arm® 32-bit Cortex® M0+ CPU for real-time Radio layer
    • Accurate RSSI to enable power control
    • Suitable for systems requiring compliance with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
    • Support for external PA
    • Available integrated passive device (IPD) companion chip for optimized matching solution (MLPF-WB-01E3, or MLPF-WB55-02E3, or MLPF-WB-02D3)
  • Ultra-low-power platform
    • 1.71 to 3.6 V power supply
    • – 40 °C to 85 / 105 °C temperature ranges
    • 12 nA shutdown mode
    • 610 nA Standby mode + RTC + 48 KB RAM
    • Active-mode MCU: 33 µA / MHz when RF and SMPS on
    • Radio: Rx 4.5 mA / Tx at 0 dBm 5.2 mA
  • Core: Arm® 32-bit Cortex®-M4 CPU with FPU, adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from flash memory, frequency up to 64 MHz, MPU, 80 DMIPS, and DSP instructions
  • Performance benchmark
    • 1.25 DMIPS/MHz (Drystone 2.1)
    • 223.03 CoreMark® (3.48 CoreMark/MHz at 64 MHz)
  • Energy benckmark
    • 318 ULPMark™ CP score
  • Supply and reset management
    • High efficiency embedded SMPS step-down converter with intelligent bypass mode
    • Ultra-safe, low-power BOR (brownout reset) with five selectable thresholds
    • Ultra-low-power POR/PDR
    • Programmable voltage detector (PVD)
    • VBAT mode with RTC and backup registers
  • Clock sources
    • 32 MHz crystal oscillator with integrated trimming capacitors (Radio and CPU clock)
    • 32 kHz crystal oscillator for RTC (LSE)
    • Internal low-power 32 kHz RC (LSI1)
    • Internal low-drift 32 kHz RC (LSI2)
    • Internal multispeed 100 kHz to 48 MHz oscillator, factory-trimmed
    • High speed internal 16 MHz factory trimmed RC
    • 1x PLL for system clock, ADC
  • Memories
    • 320 KB flash memory with sector protection (PCROP) against R/W operations, enabling radio stack and application
    • 48 KB SRAM, including 36 KB with hardware parity check
    • 20x 32-bit backup register
    • Boot loader supporting USART, SPI, I2C interfaces
    • 1 Kbyte (128 double words) OTP
    • OTA (over the air) Bluetooth® Low Energy
  • Rich analog peripherals (down to 1.62 V)
    • 12-bit ADC 2.5 Msps, 190 µA/Msps
    • 1x ultra-low-power comparator
  • System peripherals
    • Inter processor communication controller (IPCC) for communication with Bluetooth® Low Energy
    • HW semaphores for resource sharing between CPUs
    • 1x DMA controller (7x channels) supporting ADC, SPI, I2C, USART, AES, timers
    • 1x USART (ISO 7816, IrDA, SPI Master, Modbus, and Smartcard mode)
    • 1x LPUART (low power)
    • 1x SPI 32 Mbit/s
    • 1x I2C (SMBus/PMBus®)
    • Touch sensing controller, up to eight sensors
    • 1x 16-bit, four channels advanced timer
    • 1x 32-bit, four channels timer
    • 2x 16-bit ultra-low-power timer
    • 1x independent Systick
    • 1x independent watchdog
    • 1x window watchdog
  • Security and ID
    • Secure firmware installation (SFI) for Bluetooth® Low Energy SW stack
    • 2x hardware encryption AES maximum 256-bit for the application and the Bluetooth® Low Energy
    • HW public key authority (PKA)
    • Cryptographic algorithms: RSA, Diffie-Helman, ECC over GF(p)
    • True random number generator (RNG)
    • Sector protection against R/W operation (PCROP)
    • CRC calculation unit
    • Die information: 96-bit unique ID
    • IEEE 64-bit unique ID, possibility to derive Bluetooth® Low Energy 48-bit EUI
  • Up to 37 fast I/Os, 35 of them 5 V-tolerant
  • Development support
    • Serial wire debug (SWD), JTAG for the application processor
    • Application cross trigger
  • ECOPACK2 compliant packages
Out of Stock
Quantity $ per unit Savings
1-9$5.330%
10-24$4.7810%
25-99$4.5215%
100-249$3.9226%
250-499$3.7130%
500-999$3.3437%
1000-10000$2.8447%
Contact sales
$5.33
Supply Voltage Min Volt1.71
Supply Voltage Max Volt3.6
Operating Temp Min Celsius-40.0
Operating Temp Max Celsius85.0
Operating Voltage Min Volt1.71
Operating Voltage Max Volt3.6
CoreArm Cortex-M4
ECCN US5A992.c
ECCN EUNEC
Packing TypeTape And Reel
RoHs compliantEcopack2
GradeIndustrial
Package NameWLCSP 49 3.3x3.4x0.6 P 0.4 mm

The STM32WB15CC multiprotocol wireless and ultra-low-power device embeds a powerful and ultra-low-power radio compliant with the Bluetooth® Low Energy SIG specification 5.4. It contains a dedicated Arm® Cortex®-M0+ for performing all the real-time low layer operation.The device is designed to be...
Read More

Key features
  • Include ST state-of-the-art patented technology
  • Radio
    • 2.4 GHz
    • RF transceiver supporting Bluetooth® 5.4 specification
    • RX sensitivity: -95.5 dBm (Bluetooth® Low Energy at 1 Mbps)
    • Programmable output power up to +5.5 dBm with 1 dB steps
    • Integrated balun to reduce BOM
    • Support for 2 Mbps
    • Support GATT caching
    • Support EATT (enhanced ATT)
    • Dedicated Arm® 32-bit Cortex® M0+ CPU for real-time Radio layer
    • Accurate RSSI to enable power control
    • Suitable for systems requiring compliance with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
    • Support for external PA
    • Available integrated passive device (IPD) companion chip for optimized matching solution (MLPF-WB-01E3, or MLPF-WB55-02E3, or MLPF-WB-02D3)
  • Ultra-low-power platform
    • 1.71 to 3.6 V power supply
    • – 40 °C to 85 / 105 °C temperature ranges
    • 12 nA shutdown mode
    • 610 nA Standby mode + RTC + 48 KB RAM
    • Active-mode MCU: 33 µA / MHz when RF and SMPS on
    • Radio: Rx 4.5 mA / Tx at 0 dBm 5.2 mA
  • Core: Arm® 32-bit Cortex®-M4 CPU with FPU, adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from flash memory, frequency up to 64 MHz, MPU, 80 DMIPS, and DSP instructions
  • Performance benchmark
    • 1.25 DMIPS/MHz (Drystone 2.1)
    • 223.03 CoreMark® (3.48 CoreMark/MHz at 64 MHz)
  • Energy benckmark
    • 318 ULPMark™ CP score
  • Supply and reset management
    • High efficiency embedded SMPS step-down converter with intelligent bypass mode
    • Ultra-safe, low-power BOR (brownout reset) with five selectable thresholds
    • Ultra-low-power POR/PDR
    • Programmable voltage detector (PVD)
    • VBAT mode with RTC and backup registers
  • Clock sources
    • 32 MHz crystal oscillator with integrated trimming capacitors (Radio and CPU clock)
    • 32 kHz crystal oscillator for RTC (LSE)
    • Internal low-power 32 kHz RC (LSI1)
    • Internal low-drift 32 kHz RC (LSI2)
    • Internal multispeed 100 kHz to 48 MHz oscillator, factory-trimmed
    • High speed internal 16 MHz factory trimmed RC
    • 1x PLL for system clock, ADC
  • Memories
    • 320 KB flash memory with sector protection (PCROP) against R/W operations, enabling radio stack and application
    • 48 KB SRAM, including 36 KB with hardware parity check
    • 20x 32-bit backup register
    • Boot loader supporting USART, SPI, I2C interfaces
    • 1 Kbyte (128 double words) OTP
    • OTA (over the air) Bluetooth® Low Energy
  • Rich analog peripherals (down to 1.62 V)
    • 12-bit ADC 2.5 Msps, 190 µA/Msps
    • 1x ultra-low-power comparator
  • System peripherals
    • Inter processor communication controller (IPCC) for communication with Bluetooth® Low Energy
    • HW semaphores for resource sharing between CPUs
    • 1x DMA controller (7x channels) supporting ADC, SPI, I2C, USART, AES, timers
    • 1x USART (ISO 7816, IrDA, SPI Master, Modbus, and Smartcard mode)
    • 1x LPUART (low power)
    • 1x SPI 32 Mbit/s
    • 1x I2C (SMBus/PMBus®)
    • Touch sensing controller, up to eight sensors
    • 1x 16-bit, four channels advanced timer
    • 1x 32-bit, four channels timer
    • 2x 16-bit ultra-low-power timer
    • 1x independent Systick
    • 1x independent watchdog
    • 1x window watchdog
  • Security and ID
    • Secure firmware installation (SFI) for Bluetooth® Low Energy SW stack
    • 2x hardware encryption AES maximum 256-bit for the application and the Bluetooth® Low Energy
    • HW public key authority (PKA)
    • Cryptographic algorithms: RSA, Diffie-Helman, ECC over GF(p)
    • True random number generator (RNG)
    • Sector protection against R/W operation (PCROP)
    • CRC calculation unit
    • Die information: 96-bit unique ID
    • IEEE 64-bit unique ID, possibility to derive Bluetooth® Low Energy 48-bit EUI
  • Up to 37 fast I/Os, 35 of them 5 V-tolerant
  • Development support
    • Serial wire debug (SWD), JTAG for the application processor
    • Application cross trigger
  • ECOPACK2 compliant packages