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STM32WBA54CEU7

STM32WBA54CEU7

STM32WBA55UGI6

STM32WBA55UGI6

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STM32WBA54CEU6

Wireless Arm Cortex-M33 Trust Zone MCU 100 MHz with 512 Kbytes of Flash memory, Bluetooth LE 5.4, 802.15.4, ZigBee

Supply Voltage Min Volt1.71
Supply Voltage Max Volt3.6
Operating Temp Min Celsius-40.0
Operating Temp Max Celsius85.0
CoreArm Cortex-M33
ECCN US5A992.c
ECCN EUNEC
Packing TypeTray
RoHs compliantEcopack2
GradeIndustrial
Package NameUFQFPN 48 7x7x0.55 mm

The STM32WBA5xxx multiprotocol wireless and ultra-low power devices embed a powerful and ultra-low power radio compliant with the Bluetooth® SIG Low Energy specification 5.4. They operate at a frequency of up to 100 MHz.The devices integrate a 2.4 GHz RADIO supporting Bluetooth Low Energy, and...
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Key features
  • Includes ST state-of-the-art patented technology
  • Ultra-low power radio
    • 2.4 GHz radio
    • RF transceiver supporting Bluetooth® Low Energy specification 5.4, IEEE 802.15.4-2015 PHY and MAC, supporting Thread, Matter and Zigbee®
    • Proprietary protocols
    • RX sensitivity: -96 dBm (Bluetooth® Low Energy at 1 Mbps), -97.5 dBm (IEEE 802.15.4 at 250 kbps)
    • Programmable output power, +10 dBm with 1 dB steps
    • Support for external PA
    • Isochronous channel (Auracast/Unicast), AOA/AOD, long range
    • Packet traffic arbitration
    • Integrated balun to reduce BOM
    • Single crystal operation
    • Suitable for systems requiring compliance with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
  • Operating conditions:
    • 1.71 to 3.6 V power supply
    • - 40 °C to 85/105 °C temperature range
  • Ultra-low power platform with FlexPowerControl
    • Autonomous peripherals with DMA, functional down to Stop 1 mode
    • 160 nA Standby mode (16 wake-up pins)
    • 0.9 µA Standby mode with 64 KB SRAM
    • 6.5 µA Stop mode with 64 KB SRAM
    • 23 µA/MHz Run mode at 3.3 V
    • Radio: Rx 4.4 mA / Tx at 0 dBm 5.2 mA
    • Embedded regulator LDO and SMPS step-down converter supporting switch on-the-fly and voltage scaling
  • Core: Arm® 32-bit Cortex®-M33 CPU with TrustZone®, MPU, DSP, and FPU running at up to 100 MHz
  • ART Accelerator: 8-Kbyte instruction cache allowing 0-wait-state execution from flash memory (frequency up to 100 MHz, 150 DMIPS)
  • Benchmarks
    • 1.5 DMIPS/MHz (Drystone 2.1)
    • 410 CoreMark® (4.10 CoreMark/MHz)
  • Real time clock (RTC) with hardware calendar, alarms, and calibration
  • Clock sources
    • 32 MHz crystal oscillator
    • 32 kHz crystal oscillator (LSE)
    • Internal low-power 32 kHz (±5%) RC
    • Internal low frequency 32 kHz RC (500 ppm/ °C)
    • Internal 16 MHz factory trimmed RC (±1%)
    • PLL for system clock, audio and ADC
  • Memories
    • 1 MB flash memory with ECC, including 256 Kbytes with 100k cycles
    • 128 KB SRAM, including 64 KB with parity check
    • 512-byte (32 rows) OTP
  • Rich analog peripherals (independent supply)
    • 12-bit ADC 2.5 Msps, up to 16-bit with hardware oversampling
    • Two ultra-low power comparators
  • Communication peripherals
    • One SAI (serial audio interface)
    • Three UARTs (ISO 7816, IrDA, modem)
    • Two SPIs
    • Two I2C Fm+ (1 Mbit/s), SMBus/PMBus®
  • System peripherals
    • Touch sensing controller, up to 20 sensors, supporting touch key, linear, and rotary touch sensors
    • One 16-bit, advanced motor control timer
    • Three 16-bit timers
    • One 32-bit timer
    • Two low-power 16-bit timers (available in Stop mode)
    • Two Systick timers
    • Two watchdogs
    • 8-channel DMA controller, functional in Stop mode
  • Security and cryptography
    • Arm® TrustZone® and securable I/Os, memories, and peripherals
    • Flexible life cycle scheme with RDP and password protected debug
    • Root of trust thanks to unique boot entry and secure hide protection area (HDP)
    • SFI (secure firmware installation) thanks to embedded RSS (root secure services)
    • Secure data storage with root hardware unique key (RHUK)
    • Secure firmware upgrade support with TF-M
    • Two AES co-processors, including one with DPA resistance
    • Public key accelerator, DPA resistant
    • HASH hardware accelerator
    • True random number generator, NIST SP800-90B compliant
    • 96-bit unique ID
    • Active tampers
    • CRC calculation unit
  • General purpose input/output:
    • Up to 35 I/Os (most of them 5 V-tolerant) with interrupt capability
  • Development support
    • Serial wire debug (SWD), JTAG
  • ECOPACK2 compliant packages
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Quantity $ per unit Savings
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Supply Voltage Min Volt1.71
Supply Voltage Max Volt3.6
Operating Temp Min Celsius-40.0
Operating Temp Max Celsius85.0
CoreArm Cortex-M33
ECCN US5A992.c
ECCN EUNEC
Packing TypeTray
RoHs compliantEcopack2
GradeIndustrial
Package NameUFQFPN 48 7x7x0.55 mm

The STM32WBA5xxx multiprotocol wireless and ultra-low power devices embed a powerful and ultra-low power radio compliant with the Bluetooth® SIG Low Energy specification 5.4. They operate at a frequency of up to 100 MHz.The devices integrate a 2.4 GHz RADIO supporting Bluetooth Low Energy, and...
Read More

Key features
  • Includes ST state-of-the-art patented technology
  • Ultra-low power radio
    • 2.4 GHz radio
    • RF transceiver supporting Bluetooth® Low Energy specification 5.4, IEEE 802.15.4-2015 PHY and MAC, supporting Thread, Matter and Zigbee®
    • Proprietary protocols
    • RX sensitivity: -96 dBm (Bluetooth® Low Energy at 1 Mbps), -97.5 dBm (IEEE 802.15.4 at 250 kbps)
    • Programmable output power, +10 dBm with 1 dB steps
    • Support for external PA
    • Isochronous channel (Auracast/Unicast), AOA/AOD, long range
    • Packet traffic arbitration
    • Integrated balun to reduce BOM
    • Single crystal operation
    • Suitable for systems requiring compliance with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
  • Operating conditions:
    • 1.71 to 3.6 V power supply
    • - 40 °C to 85/105 °C temperature range
  • Ultra-low power platform with FlexPowerControl
    • Autonomous peripherals with DMA, functional down to Stop 1 mode
    • 160 nA Standby mode (16 wake-up pins)
    • 0.9 µA Standby mode with 64 KB SRAM
    • 6.5 µA Stop mode with 64 KB SRAM
    • 23 µA/MHz Run mode at 3.3 V
    • Radio: Rx 4.4 mA / Tx at 0 dBm 5.2 mA
    • Embedded regulator LDO and SMPS step-down converter supporting switch on-the-fly and voltage scaling
  • Core: Arm® 32-bit Cortex®-M33 CPU with TrustZone®, MPU, DSP, and FPU running at up to 100 MHz
  • ART Accelerator: 8-Kbyte instruction cache allowing 0-wait-state execution from flash memory (frequency up to 100 MHz, 150 DMIPS)
  • Benchmarks
    • 1.5 DMIPS/MHz (Drystone 2.1)
    • 410 CoreMark® (4.10 CoreMark/MHz)
  • Real time clock (RTC) with hardware calendar, alarms, and calibration
  • Clock sources
    • 32 MHz crystal oscillator
    • 32 kHz crystal oscillator (LSE)
    • Internal low-power 32 kHz (±5%) RC
    • Internal low frequency 32 kHz RC (500 ppm/ °C)
    • Internal 16 MHz factory trimmed RC (±1%)
    • PLL for system clock, audio and ADC
  • Memories
    • 1 MB flash memory with ECC, including 256 Kbytes with 100k cycles
    • 128 KB SRAM, including 64 KB with parity check
    • 512-byte (32 rows) OTP
  • Rich analog peripherals (independent supply)
    • 12-bit ADC 2.5 Msps, up to 16-bit with hardware oversampling
    • Two ultra-low power comparators
  • Communication peripherals
    • One SAI (serial audio interface)
    • Three UARTs (ISO 7816, IrDA, modem)
    • Two SPIs
    • Two I2C Fm+ (1 Mbit/s), SMBus/PMBus®
  • System peripherals
    • Touch sensing controller, up to 20 sensors, supporting touch key, linear, and rotary touch sensors
    • One 16-bit, advanced motor control timer
    • Three 16-bit timers
    • One 32-bit timer
    • Two low-power 16-bit timers (available in Stop mode)
    • Two Systick timers
    • Two watchdogs
    • 8-channel DMA controller, functional in Stop mode
  • Security and cryptography
    • Arm® TrustZone® and securable I/Os, memories, and peripherals
    • Flexible life cycle scheme with RDP and password protected debug
    • Root of trust thanks to unique boot entry and secure hide protection area (HDP)
    • SFI (secure firmware installation) thanks to embedded RSS (root secure services)
    • Secure data storage with root hardware unique key (RHUK)
    • Secure firmware upgrade support with TF-M
    • Two AES co-processors, including one with DPA resistance
    • Public key accelerator, DPA resistant
    • HASH hardware accelerator
    • True random number generator, NIST SP800-90B compliant
    • 96-bit unique ID
    • Active tampers
    • CRC calculation unit
  • General purpose input/output:
    • Up to 35 I/Os (most of them 5 V-tolerant) with interrupt capability
  • Development support
    • Serial wire debug (SWD), JTAG
  • ECOPACK2 compliant packages
Associated products