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    MASTERGAN3TR

    MASTERGAN3TR

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    MASTERGAN3

    High power density 600 V Half bridge driver with two enhancement mode GaN HEMTs

    Parameters
    ECCN USEAR99
    ECCN EUNEC
    Packing TypeTray
    RoHs compliantEcopack2
    GradeIndustrial
    Package NameVFQFPN 9X9X1.0 31L PITCH 0.6MM
    Description

    The MASTERGAN3 is an advanced power system-in-package integrating a gate driver and two enhancement mode GaN transistors in asymmetrical half‑bridge configuration.The integrated power GaNs have 650 V drain‑source blocking voltage and RDS(ON) of 225 mΩ and 450 mΩ for Low side and...
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    Key features
    Key features
    • 600 V system-in-package integrating half-bridge gate driver and high-voltage power GaN transistors in asymmetrical configuration:
      • QFN 9 x 9 x 1 mm package
      • RDS(ON) = 225 mΩ (LS) + 450 mΩ (HS)
      • IDS(MAX) = 6.5 A (LS) + 4 A (HS)
    • Reverse current capability
    • Zero reverse recovery loss
    • UVLO protection on low-side and high-side
    • Internal bootstrap diode
    • Interlocking function
    • Dedicated pin for shutdown functionality
    • Accurate internal timing match
    • 3.3 V to 15 V compatible inputs with hysteresis and pull-down
    • Overtemperature protection
    • Bill of material reduction
    • Very compact and simplified layout
    • Flexible, easy and fast design.
    Out of Stock
    Quantity $ per unit Savings
    1-500$7.670%
    500 + Contact sales
    $7.67
    Parameters
    ECCN USEAR99
    ECCN EUNEC
    Packing TypeTray
    RoHs compliantEcopack2
    GradeIndustrial
    Package NameVFQFPN 9X9X1.0 31L PITCH 0.6MM
    Description

    The MASTERGAN3 is an advanced power system-in-package integrating a gate driver and two enhancement mode GaN transistors in asymmetrical half‑bridge configuration.The integrated power GaNs have 650 V drain‑source blocking voltage and RDS(ON) of 225 mΩ and 450 mΩ for Low side and...
    Read More

    Key features
    Key features
    • 600 V system-in-package integrating half-bridge gate driver and high-voltage power GaN transistors in asymmetrical configuration:
      • QFN 9 x 9 x 1 mm package
      • RDS(ON) = 225 mΩ (LS) + 450 mΩ (HS)
      • IDS(MAX) = 6.5 A (LS) + 4 A (HS)
    • Reverse current capability
    • Zero reverse recovery loss
    • UVLO protection on low-side and high-side
    • Internal bootstrap diode
    • Interlocking function
    • Dedicated pin for shutdown functionality
    • Accurate internal timing match
    • 3.3 V to 15 V compatible inputs with hysteresis and pull-down
    • Overtemperature protection
    • Bill of material reduction
    • Very compact and simplified layout
    • Flexible, easy and fast design.
    Associated products