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32-bit Power Architecture MCU for High Performance Applications

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Parameter NameParameter Value
Operating Temp Min Celsius-40.0
ECCN US5A991.b.4.a
Packing TypeTape And Reel
RoHs compliantEcopack2
GradeAutomotive Safety
Package NameFPBGA 17X17X1.8 292 B0.55 P0.8

SPC58 N line MCU, based on Power Architecture® Technology, is designed for mission-critical automotive applications where most stringent safety standards and real-time performance really matters.

SPC58 N line high performance and real time capabilities, combined with ISO26262 ASIL D functional safety compliance and embedded security, address high and mid powertrain applications, Electric vehicles.

Key features
  • AEC-Q100 qualified
  • 32-bit Power Architecture VLE compliant CPU cores:
    • Five enhanced main e200z4256n3 cores, dual issue, two paired in lockstep
    • Floating Point, End-to-End Error Correction
  • 6576 KB (6288 KB code flash + 288 KB data flash) on-chip flash memory:
    • supports read during program and erase operations, and multiple blocks allowing EEPROM emulation
    • Supports read while read between the two code Flash partitions.
  • 128 KB on-chip general-purpose SRAM (in addition to 384 KB included in the CPUs)
  • 96-channel direct memory access controller (eDMA)
  • Comprehensive new generation ASIL-D safety concept
    • ASIL-D of ISO 26262
    • FCCU for collection and reaction to failure notifications
    • Memory Error Management Unit (MEMU) for collection and reporting of error events in memories
    • Cyclic redundancy check (CRC) unit
  • Junction temperature range -40 °C to 165 °C
  • Dual-channel FlexRay controller
  • Hardware Security Module (HSM)
  • GTM344 - generic timer module
    • Intelligent complex timer module
    • 144 channels (48 input and 96 output)
    • 5 programmable fine grain multi-threaded cores
    • 61 KB of dedicated RAM
    • 24-bit wide channels
  • Enhanced analog-to-digital converter system with:
    • 1 supervisor 12-bit SAR analog converter
    • 2 separate 10-bit SAR analog converter
    • 4 separate fast 12-bit SAR analog converters
    • 6 separate 16-bit Sigma-Delta analog converter with programmable decimation filters
  • SAR ADC Queued digital interfaces for individual channel ordering and command sequencing
  • Communication interfaces
    • 7 LINFlexD modules
    • 8 deserial serial peripheral interface (DSPI) modules
    • 7 modular controller area network (MCAN) modules, and one time-triggered controller area network (M-TTCAN), all supporting flexible data rat
Associated Products