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The STGAP2D is a half-bridge gate driver which isolates the gate driving channels from the low voltage control and interface circuitry.
The gate driver is characterized by 4 A capability and rail-to-rail outputs, making the device also suitable for high power inverter applications such as motor drivers in industrial applications.
The device integrates protection functions: dedicated SD and BRAKE pins are available, UVLO and thermal shutdown are included to easily design high reliability systems, and an interlocking function prevents outputs from being high at the same time.
The input to output propagation delay results are contained within 75 ns, providing high PWM control accuracy.
A standby mode is available in order to reduce idle power consumption.
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