STW81200T

Wide Band Frac-Integer-N Integrated Synthesizer

Parameters

ECCN US	EAR99
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Industrial
Package Name	VFQFPN 36 6x6x1.0 mm

Description

The STW81200 is a dual architecture frequency synthesizer (Fractional-N and Integer-N), that features three low phase-noise VCOs with a fundamental frequency range of 3.0 GHz to 6.0 GHz and a programmable dual RF output divider stage which allows coverage from 46.875 MHz to 6 GHz.The STW81200...
Read More

Key features

Key features
Output frequency range: 46.875 to 6000 MHz Very low noise Normalized in band phase noise floor: -227 dBc/Hz VCO phase noise: -135 dBc/Hz @ 1 MHz offset, 4.0 GHz carrier Noise floor: -160 dBc/Hz Dual architecture frequency synthesizer: Fractional-N and Integer-N Integrated VCOs with automatic center frequency calibration Programmable RF output dividers by 1/2/4/8/16/32/64 Dual RF Output broadband matched with programmable power level and mute function External VCO option with 5 V charge pump Integrated low noise LDO voltage regulators Maximum phase detector frequency: 100 MHz Exact frequency mode Fast lock and cycle slip reduction Differential reference clock input (LVDS and LVECPL compliant) supporting up to 800 MHz 13-bit programmable reference frequency divider Programmable charge pump current Digital lock detector Integrated reference crystal oscillator core R/W SPI interface Logic compatibility/tolerance 1.8 V/3.3 V Low power functional mode Supply voltage: 3.0 V to 5.4 V Small size exposed pad VFQFPN36 package 6 x 6 x 1.0 mm Process: BICMOS 0.25 μm SiGe

In stock

Quantity	$ per unit	Savings
1-9	$13.72	0%
10-24	$11.34	17%
25-99	$10.87	21%
100-249	$9.41	31%
250-499	$9.10	34%
500	$8.52	38%
500 +	Contact sales

$13.72

Parameters

ECCN US	EAR99
ECCN EU	NEC
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Industrial
Package Name	VFQFPN 36 6x6x1.0 mm

Description

Key features

Key features
Output frequency range: 46.875 to 6000 MHz Very low noise Normalized in band phase noise floor: -227 dBc/Hz VCO phase noise: -135 dBc/Hz @ 1 MHz offset, 4.0 GHz carrier Noise floor: -160 dBc/Hz Dual architecture frequency synthesizer: Fractional-N and Integer-N Integrated VCOs with automatic center frequency calibration Programmable RF output dividers by 1/2/4/8/16/32/64 Dual RF Output broadband matched with programmable power level and mute function External VCO option with 5 V charge pump Integrated low noise LDO voltage regulators Maximum phase detector frequency: 100 MHz Exact frequency mode Fast lock and cycle slip reduction Differential reference clock input (LVDS and LVECPL compliant) supporting up to 800 MHz 13-bit programmable reference frequency divider Programmable charge pump current Digital lock detector Integrated reference crystal oscillator core R/W SPI interface Logic compatibility/tolerance 1.8 V/3.3 V Low power functional mode Supply voltage: 3.0 V to 5.4 V Small size exposed pad VFQFPN36 package 6 x 6 x 1.0 mm Process: BICMOS 0.25 μm SiGe