STA1385EOAS2

Telemaco3P automotive family of telematics and connectivity microprocessor

Parameters

Supply Voltage Min Volt	1.14
Supply Voltage Max Volt	1.21
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	105.0
Core	Dual Arm Cortex-A7
ECCN US	5A992.c
ECCN EU	5A002.a.2
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Automotive
Package Name	LFBGA 361 16x16x1.7

Description

STA1385 is a fully automotive, power efficient System-On-Chip, targeting cost effective processing solutions for innovative Telematics and Connectivity applications including Cyber-security protection.It features a powerful Dual ARM Cortex-A7 processor, an embedded and independent Hardware Security...
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Key features

Key features
AEC-Q100 qualified Grade 2 Core and Infrastructure Dual ARM CortexA7 up to 600 MHz, withMMU, FPU and NEON support Memory organization:Embedded Vehicle Interface L1 Cache: 32 KB I, 32 KB D L2 Cache: 256 KB Total embedded SRAM: 768 KB Isolated Cortex-M3 core L1 Cache: 8 KB I 256 KB reserved embedded SRAM (extendible to 768 KB) 1x CAN Standard (C_CAN) 2x CAN FD (M_CAN) 1x Flexray 1x SD/MMC/SDIO SDR50 (SD/MMC0) 1x SD/MMC/SDIO SDR25 (SD/MMC1) 1x USB 2.0 DR with HS PHY and HSIC 1x USB 2.0 DR with HS PHY 2x ETH AVB MAC with RMII/RGMII HIS SHE/SHE+ Service Set with extensions for PKC (SHE_EXT) Cryptographic Functions Accelerators Symmetric keys: MP AES Public keys: RSA, ECC Hash: MD5, SHA1, SHA2 True Random Number Generator User pogrammable OTP memory (eHSM OTP) 16-bit DDR3L-1066 (533 MHz) 16-bit LPDDR2-800 (400 MHz) SQI Interface 8-bit Parallel NAND (1 chip select) 1x 6-channel 10-bits ADC 3x I2C multi-master/slave interfaces 6x UART controller 3xI2S audio interfaces 3x Synchronous Serial Port (SSP/SPI) 5x 32-bit GPIO ports JTAG based in-circuit emulator (ICE) with Embedded Trace Module VDD, VDD_ARM: 1.14 V-1.21 V VDD_IO_3V3: 3.3 V ±10% VDD_IO_SDMMC0: 1.8 V-3.3 V ±10% VDD_IO_BOOT: 1.8 V/3.3 V ±10% VDD_IO_ON: 3.3 V ± 10% VDDQ: 1.35 V ± 5% (DDR3L) Junction temperature range: -40 C/ +150 C

Out of Stock

Quantity	$ per unit	Savings
1-500	$25.17	0%
500 +	Contact sales

$25.17

Parameters

Supply Voltage Min Volt	1.14
Supply Voltage Max Volt	1.21
Operating Temp Min Celsius	-40.0
Operating Temp Max Celsius	105.0
Core	Dual Arm Cortex-A7
ECCN US	5A992.c
ECCN EU	5A002.a.2
Packing Type	Tray
RoHs compliant	Ecopack2
Grade	Automotive
Package Name	LFBGA 361 16x16x1.7

Description

Key features

Key features
AEC-Q100 qualified Grade 2 Core and Infrastructure Dual ARM CortexA7 up to 600 MHz, withMMU, FPU and NEON support Memory organization:Embedded Vehicle Interface L1 Cache: 32 KB I, 32 KB D L2 Cache: 256 KB Total embedded SRAM: 768 KB Isolated Cortex-M3 core L1 Cache: 8 KB I 256 KB reserved embedded SRAM (extendible to 768 KB) 1x CAN Standard (C_CAN) 2x CAN FD (M_CAN) 1x Flexray 1x SD/MMC/SDIO SDR50 (SD/MMC0) 1x SD/MMC/SDIO SDR25 (SD/MMC1) 1x USB 2.0 DR with HS PHY and HSIC 1x USB 2.0 DR with HS PHY 2x ETH AVB MAC with RMII/RGMII HIS SHE/SHE+ Service Set with extensions for PKC (SHE_EXT) Cryptographic Functions Accelerators Symmetric keys: MP AES Public keys: RSA, ECC Hash: MD5, SHA1, SHA2 True Random Number Generator User pogrammable OTP memory (eHSM OTP) 16-bit DDR3L-1066 (533 MHz) 16-bit LPDDR2-800 (400 MHz) SQI Interface 8-bit Parallel NAND (1 chip select) 1x 6-channel 10-bits ADC 3x I2C multi-master/slave interfaces 6x UART controller 3xI2S audio interfaces 3x Synchronous Serial Port (SSP/SPI) 5x 32-bit GPIO ports JTAG based in-circuit emulator (ICE) with Embedded Trace Module VDD, VDD_ARM: 1.14 V-1.21 V VDD_IO_3V3: 3.3 V ±10% VDD_IO_SDMMC0: 1.8 V-3.3 V ±10% VDD_IO_BOOT: 1.8 V/3.3 V ±10% VDD_IO_ON: 3.3 V ± 10% VDDQ: 1.35 V ± 5% (DDR3L) Junction temperature range: -40 C/ +150 C