STM6513SEIEDG6F

The STM6513 has two separate delayed Smart Reset inputs (SR0, SR1) which when taken low simultaneously provide three user-selectable delayed Smart Reset setup time (t_SRC) options of 2 s, 6 s and 10 s. These are selected through a three-state TSR input pin: when connected to ground, t_SRC= 2 s; when left open, t_SRC= 6 s; when connected to V_CC, t_SRC= 10 s (all the times are minimum). There are two reset outputs, both going active simultaneously after both the Smart Reset inputs were held active for the selected t_SRCdelay time. The first reset output, RST1, is active-high, push-pull; the second reset output, RST2, is active-low, open-drain requiring an external pull-up resistor. The duration of the output reset pulses is independently programmable: t_REC1is user-programmable (by external capacitor C_tREC), t_REC2is factory-programmed to 210 ms (typ.), with the option of 360 ms typ. Additionally, the V_CCis monitored and if it drops below the selected V_RSTthreshold, both the reset outputs go active and remain so while V_CCis below the V_RSTthreshold, plus the defined duration of the reset pulse t_RECon each output.