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    MASTERGAN2TR

    MASTERGAN2TR

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    MASTERGAN2

    High power density 600V Half bridge driver with two enhancement mode GaN HEMTs

    Parameters
    Operating Temp Min Celsius-40.0
    Operating Temp Max Celsius125.0
    ECCN USEAR99
    ECCN EUNEC
    Packing TypeTray
    RoHs compliantEcopack2
    GradeIndustrial
    Package NameVFQFPN 9X9X1.0 31L PITCH 0.6MM
    Description

    The MASTERGAN2 is an advanced power system-in-package integrating a gate driver and two enhancement mode GaN transistors in asymmetrical half‑bridge configuration.The integrated power GaNs have 650 V drain‑source blocking voltage and RDS(ON) of 150 mΩ and 225 mΩ for Low side and...
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    Key features
    Key features
    • 600 V system-in-package integrating half-bridge gate driver and high-voltage power GaN transistors in asymmetrical configuration:
      • QFN 9 x 9 x 1 mm package
      • RDS(ON) = 150 mΩ (LS) + 225 mΩ (HS)
      • IDS(MAX) = 10 A (LS) + 6.5 A (HS)
    • Reverse current capability
    • Zero reverse recovery loss
    • UVLO protection on low-side and high-side
    • Internal bootstrap diode
    • Interlocking function
    • Dedicated pin for shutdown functionality
    • Accurate internal timing match
    • 3.3 V to 15 V compatible inputs with hysteresis and pull-down
    • Overtemperature protection
    • Bill of material reduction
    • Very compact and simplified layout
    • Flexible, easy and fast design.
    Out of Stock
    Quantity $ per unit Savings
    1-9$12.1744%
    10-24$9.6814%
    25-99$9.148%
    100-249$8.144%
    250-499$6.3325%
    500$5.8331%
    500 + Contact sales
    $8.47
    Parameters
    Operating Temp Min Celsius-40.0
    Operating Temp Max Celsius125.0
    ECCN USEAR99
    ECCN EUNEC
    Packing TypeTray
    RoHs compliantEcopack2
    GradeIndustrial
    Package NameVFQFPN 9X9X1.0 31L PITCH 0.6MM
    Description

    The MASTERGAN2 is an advanced power system-in-package integrating a gate driver and two enhancement mode GaN transistors in asymmetrical half‑bridge configuration.The integrated power GaNs have 650 V drain‑source blocking voltage and RDS(ON) of 150 mΩ and 225 mΩ for Low side and...
    Read More

    Key features
    Key features
    • 600 V system-in-package integrating half-bridge gate driver and high-voltage power GaN transistors in asymmetrical configuration:
      • QFN 9 x 9 x 1 mm package
      • RDS(ON) = 150 mΩ (LS) + 225 mΩ (HS)
      • IDS(MAX) = 10 A (LS) + 6.5 A (HS)
    • Reverse current capability
    • Zero reverse recovery loss
    • UVLO protection on low-side and high-side
    • Internal bootstrap diode
    • Interlocking function
    • Dedicated pin for shutdown functionality
    • Accurate internal timing match
    • 3.3 V to 15 V compatible inputs with hysteresis and pull-down
    • Overtemperature protection
    • Bill of material reduction
    • Very compact and simplified layout
    • Flexible, easy and fast design.
    Associated products